MPF0900AMBA2ES datasheet(68/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

All parameters are specified at TA = -40 to 125 °C, unless otherwise noted. Typical values are characterized at VIN = 5 V and

TA = 25 °C unless otherwise noted.

Symbol

Description

Min

Typ

Max

Unit

RXPU_SCL_HS

SCL external pullup high speed

• Pullup to VDDIO

• I2C high speed

–

0.8

–

kΩ

RXPU_SDA_HS

SDA external pullup high speed

• Pullup to VDDIO

• I2C high speed

–

0.8

–

kΩ

Table 63. Electrical characteristics...continued

12.8.2 PWRON

The PWRON is an input signal to the PF09 that acts as a power-up event signal for the device. It provides two

modes of operations as programmed by the OTP_PWRON_MODE bit.

OTP_PWRON_MODE

PWRON operation mode

Level Sensitive

Edge Sensitive

Table 64. PWRON operation mode

Refer to Section 12.3 for details on power-up requirements.

12.8.2.1 Level-sensitive mode

When the PWRON is programmed in In level-sensitive mode, the PWRON pin is used to command the PMICs

to generate a power on/off event by controlling the pin high or low, respectively.

When the PWRON pin is asserted low, the device is forced into the corresponding off state, and pulling the

PWRON pin high will generate a power-on event.

PWRON may be pulled up to VIN with an external pullup resistor, if the device is intended to come up

automatically when the main power is applied.

12.8.2.2 Edge-sensitive mode

When the PWRON is programmed in edge-sensitive mode, PWRON may be pulled up to VIN through a 470 kΩ

resistor connected to a pushbutton or a controlled signal to generate a Falling-edge pulse on the PWRON pin.

In this mode, the PWRON pin is expected to be pulled up to VIN all the time, hence the system must make

a tradeoff between having an ultra-low quiescent current in the OFF state and the ability to operate in edge

transition.

In edge sensitive mode, a Falling edge on the PWRON pin is used to generate a power-up event when the

device is in the LPOFF state.

During the system-on states, the PWRON pin is used to request a turnoff event by generating a new falling-

edge transition and holding the PWRON pin low for as long as the selected time to reset (TRESET).

TRESET[1:0]

Time to reset

100 μs

Table 65. Time to reset

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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