MPF0900AMBA2ES datasheet(73/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

PG_EN bits

Option

PGOOD Control

VMON1 does not control PGOOD

VMON1_PG_EN

VMON1 controls PGOOD

VMON2 does not control PGOOD

VMON2_PG_EN

VMON2 controls PGOOD

Table 72. Voltage reels PGOOD triggers...continued

The PGOOD pin is released high when the all of the voltage monitors selected to control the PGOOD pins are

in regulation (within the UV/OV range), and it will be asserted low when any of such regulators goes above or

below the programmed OV/UV thresholds.

In order to ensure the system is still capturing OV/UV fault conditions even when the PGOOD pin is not

assigned to report a specific condition, all regulators will report the corresponding status and fault events via

the interrupt bits, regardless of the configuration of the PG_EN bits. For more details on interrupt management,

refer to section 16.7.2 Interrupt Management.

The PGOOD pin will report the power good status of all regulators that have been enabled during the RUN or

the monitored STANDBY (OTP_LP_STBY = 0) states, and the pin will be asserted low if there are no regulators

or VMON blocks enabled in the system.

When the PF09 is operating in the low-power STANDBY state (OTP_LP_STBY = 1), all voltage monitors are

disabled to ensure the lowest quiescent current possible. In this scenario, the PGOOD pin will remain released

as long as there are one or more regulators/VMONs enabled in the system.

During the Power-up sequence, the PGOOD pin is held low. It will be released high only after the RSTB pin is

released in the Power up sequence to allow the system to receive the power good status as soon as the system

is brought out of reset. Refer to section 16.6.4 Fault Monitoring during Time Based Power-up for details on the

power good monitoring during the Power-up sequence.

12.8.6.1 PGOOD pin diagnostic

The PGOOD_S flag is provided to read the real-time state of the PGOOD pin.

PGOOD_S

PGOOD state

LOW

HIGH

Table 73. PGOOD_S flag

The PGOOD_FLT_I interrupt is provided to notify a short-to-high or short-to-low condition has been present

on the PGOOD pin. If a fault condition is present on the PGOOD pin, and the PGOOD_FLT_I interrupt is

unmasked, the INTB pin will be asserted low. The PGOOD_FLT_I can be cleared by writing a 1 to it.

The PGOOD_S2H flag is provided to sense a real time short-to-high condition in the PGOOD pin. When the

PGOOD pin is being driven low internally, and the PGOOD_S is sensing a high state, the PGOOD_S2H flag will

be set HIGHuntil the condition is cleared.

The PGOOD_S2L flag is provided to sense a real time short-to-low condition in the PGOOD pin. When the

PGOOD pin is released high internally, and the PGOOD_S is sensing a low state, the PGOOD_S2L flag will be

set HIGH until the condition is cleared.

12.8.7 FS0B

The FS0B pin is an active-low, open-drain safety output. The FS0B pin can be pulled up to VDDIO or VIN

externally with a 10 kΩ to 470 kΩ resistor, based on the system requirements.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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