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MPF0900AMBA2ES датащи(PDF) 49 Page - NXP Semiconductors |
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MPF0900AMBA2ES датащи(HTML) 49 Page - NXP Semiconductors |
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49 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring 12.6.2.1 Output state control Switching regulators and LDOs supplied by the PF09 are provided with an _OV_STATE bit to select whether the regulator is kept enabled or disabled when the corresponding regulator experiences an OV condition. SWx_OV_STATE, LDOx_OV_STATE Regulator reaction on OV 0 Output disabled 1 Output enabled Table 43. Regulation reaction on OV condition Switching regulators and LDOs supplied by the PF09,are provided with an _UV_STATE bit to select whether the regulator is kept enabled or disabled when the corresponding regulator experience an UV condition. SWx_UV_STATE LDOx_UV_STATE Regulator reaction on UV 0 Output disabled 1 Output enabled Table 44. Regulation reaction on UV condition By default the _OV_STATE and _UV_STATE bits are set to 1, and the MCU is expected to configure the reaction of each specific supply during the system configuration sequence, during the booting stage. The table below lists all the functional bits associated with enabling/disabling the voltage regulators when they experience an OV/UV condition. Regulator Bit to disable the regulator during undervoltage Bit to disable the regulator during overvoltage SW1 SW1_UV_STATE SW1_OV_STATE SW2 SW2_UV_STATE SW2_OV_STATE SW3 SW3_UV_STATE SW3_OV_STATE SW4 SW4_UV_STATE SW4_OV_STATE SW5 SW5_UV_STATE SW5_OV_STATE LDO1 LDO1_UV_STATE LDO1_OV_STATE LDO2 LDO2_UV_STATE LDO2_OV_STATE LDO3 LDO3_UV_STATE LDO3_OV_STATE VAON VAON_UV_STATE[1] VAON_OV_STATE[1] Table 45. Bits used to disable regulator during UV or OV [1] The _STATE bits for the VAON are only applicable when the VAON is working as a system regulator. (not valid in Always-on mode) When a regulator is programmed to be disabled upon an OV or UV, a _FLT_REN bit is provided to decide whether a regulator can return to its previous configuration or remain disabled after it has been disabled due to an OV or UV condition. SWx_FLT_REN LDOx_FLT_REN Output re-enable 0 Output remains disabled 1 Output enabled Table 46. Output re-enable PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 49 / 205 |
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