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MPF0900AMBA2ES датащи(PDF) 149 Page - NXP Semiconductors |
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MPF0900AMBA2ES датащи(HTML) 149 Page - NXP Semiconductors |
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149 / 205 page ![]() NXP Semiconductors PF09 Nine-channel power management IC with advanced system safety monitoring aaa-056573 7 6 5 4 3 x7 + x4 + x3 + x2 + 1 Default seed = 1010 0101 2 1 0 Figure 39. Dynamic watchdog polynomial When operating in dynamic WD mode, WD_SEED = 0x00 or WD_SEED = 0xFF are invalid values. The PMIC will ignore the command and generate a WD_ERROR_I interrupt to notify the system that no action has been taken. 14.4.3 Servicing the watchdog timer The procedure to clear the watchdog counter is the same for both static and dynamic watchdog, with the only difference that the seed required to clear the watchdog will keep changing when the dynamic WD mode is enabled, whereas the seed remains stable in the static WD mode. To service the watchdog, the MCU must write a valid response in the WD_CLEAR[7:0] bits before the watchdog timer expires. A valid response must meet the following conditions: • The response is calculated as the bitwise NOT of the WD_SEED[7:0] bits. • The response must be provided within an open window. Providing a valid key into the WD_CLEAR[7:0] register will generate a WD_OK event. When the MCU fails to clear the system watchdog (invalid response or WD duration expired), the device will generate a WD_NOK event, set the WD_ERROR_I flag, and the INTB will be asserted, as long as the interrupt is not masked The watchdog timer will be reset after either a WD_OK or a WD_NOK event, to start a new service window. The WD_DURATION[3:0] bits are used to set the duration of the watchdog timer to service the watchdog. The WD timer will expire when it reaches the value set on the WD_DURATION[3:0] while WD refresh is present. WD_DURATION[3:0] Watchdog timer duration 0000 1 ms 0001 2 ms 0010 4 ms 0011 8 ms 0100 16 ms 0101 32 ms 0110 64 ms 0111 128 ms 1000 256 ms 1001 512 ms 1010 1024 ms Table 196. System watchdog timer configuration bits PF09 All information provided in this document is subject to legal disclaimers. © 2026 NXP B.V. All rights reserved. Product data sheet Rev. 1.3 — 16 December 2025 Document feedback 149 / 205 |
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