MPF0900AMBA2ES datasheet(148/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

WD_EN

WD Ttmer

WD disabled

WD enabled

Table 195. System watchdog enable bit

The system watchdog is not available in the Low-power STANDBY or SYSTEM OFF states.

The PF09 family of devices supports two different modes of operation for the watchdog monitoring interface.

The mode of operation depends on the target safety integrity level supported by each specific device version.

For QM and ASIL B devices requiring low to medium coverage, a static watchdog is used to ensure coverage

for timing, stuck-at and I2C data write conditions in the MCU.

For custom ASIL B, ASIL D and SIL 2 devices requiring medium to high coverage, a dynamic watchdog is used

to ensure coverage for timing, stuck-at conditions, I2C read/write and data computing condition in the MCU.

14.4.1 Static WD

On devices using the static watchdog, the WD_SEED[7:0] register will provide a static seed to clear the

watchdog.

The WD_SEED[7:0] bits will be reset to the default value (0xA5) at power up and during hard reset conditions,

however a soft reset will not reset the WD seed.

The system will always use the selected value in the WD_SEED[7:0] bits to calculate the response to service

the PMIC watchdog, but the MCU can modify this value if it decides to use a different key for security purposes.

14.4.2 Dynamic WD

On devices using the dynamic watchdog, the WD_SEED [7:0] bits will provide a dynamic seed to be used to

clear the watchdog.

The default value of the WD_SEED[7:0] bits at power-up and hard-reset conditions is reset to 0xA5, and it will

recalculate every time a WD refresh is attempted (regardless of whether it is successful or not). A soft reset

condition will not reset the WD_SEED[7:0] bits, to provide continuity to the previous dynamic seed generation

loop.

The system can implement two different strategies to service the dynamic watchdog. based on the level of

complexity required to ensure processing coverage:

1. Seed readback method: the MCU must read the current seed from the WD_SEED[7:0] bits, and use the

value read to calculate the response key to service the current WD cycle.

2. Seed calculation method: the MCU will synchronize its starting seed with the PMIC during the booting

sequence, and it must implement an algorithm to calculate the next seed using the same algorithm as the

one implemented in the PF09 watchdog interface, such that it can keep servicing the watchdog without

requiring any further seed synchronization from the PMIC. If the MCU falls out of synchronization, it can

always read the current seed, or re-set the seed via I2C, to regain synchronization with the PMIC.

The polynomial used to calculate the dynamic seed in the PF09 is provided below:

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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