AD9557SLASHPCBZ datasheet(23/92 Pages) AD

23 / 92 page

Data Sheet

AD9557

Rev. A | Page 23 of 92

–30

–27

–24

–21

–18

–15

–12

–9

–6

–3

100

10k

100k

FREQUENCY OFFSET (Hz)

LOOP BW = 100Hz;

HIGH PHASE MARGIN;

PEAKING: 0.06dB; –3dB: 69Hz

LOOP BW = 2kHz;

HIGH PHASE MARGIN;

PEAKING: 0.097dB; –3dB: 1.23kHz

LOOP BW = 5kHz;

HIGH PHASE MARGIN;

PEAKING: 0.14dB; –3dB: 4.27kHz

–0.2

0.2

0.6

1.0

1.4

1.8

2.2

2.6

3.0

3.4

–1

123

456

9 10 11 12 13 14 15

TIME (ns)

10pF LOAD

2pF LOAD

Figure 28. Closed-Loop Transfer Function for 100 Hz, 2 kHz, and 5 kHz Loop

Bandwidth Settings; High Phase Margin Loop Filter Setting

(This is compliant with Telcordia GR-253 jitter transfer test for loop

bandwidths < 2 kHz.)

Figure 25. Output Waveform,

3.3 V CMOS (100 MHz, Strong Mode)

–1

123

456

9 10 11 12 13 14 15

TIME (ns)

–0.1

0.1

0.3

0.5

0.7

0.9

1.1

1.3

1.5

1.7

1.9

10pF LOAD

2pF LOAD

–30

–27

–24

–21

–18

–15

–12

–9

–6

–3

100

FREQUENCY OFFSET (Hz)

10k

100k

LOOP BW = 100Hz;

NORMAL PHASE MARGIN;

PEAKING: 0.09dB; –3dB: 117Hz

LOOP BW = 2kHz;

NORMAL PHASE MARGIN;

PEAKING: 1.6dB; –3dB: 2.69kHz

Figure 29. Closed-Loop Transfer Function for 100 Hz and 2 kHz Loop

Bandwidth Settings; Normal Phase Margin Loop Filter Setting

Figure 26. Output Waveform, 1.8 V CMOS (100 MHz)

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

–5

152535

4555657585

TIME (ns)

10pF LOAD

2pF LOAD

Figure 27. Output Waveform, 3.3 V CMOS (20 MHz, Weak Mode)

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