AD9557SLASHPCBZ datasheet(21/92 Pages) AD

21 / 92 page

Data Sheet

AD9557

Rev. A | Page 21 of 92

–160

–150

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–120

–110

–100

–90

–80

–70

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

INTEGRATED RMS JITTER (12kHz TO 20MHz): 391fs

Figure 13. Absolute Phase Noise (Output Driver = 3.3 V CMOS),

fR = 19.44 MHz, fO =161.1328125 MHz,

DPLL Loop BW = 0.1 Hz, fSYS = 19.2 MHz TCXO

–160

–150

–140

–130

–120

–110

–100

–90

–80

–70

100

10k

100k

10M

100M

FREQUENCY OFFSET (Hz)

INTEGRATED RMS JITTER (12kHz TO 20MHz): 395fs

Figure 14. Absolute Phase Noise (Output Driver = 1.8 V CMOS),

fR = 2 kHz, fO = 70.656 MHz,

DPLL Loop BW = 0.1 Hz, fSYS = 19.2 MHz TCXO

100

10k

100k

10M

100M

–160

–150

–140

–130

–120

–110

–100

–90

–80

–70

–60

FREQUENCY OFFSET (Hz)

INTEGRATED RMS JITTER (12kHz TO 20MHz): 388fs

Figure 15. Absolute Phase Noise (Output Driver = HSTL),

fR = 19.44 MHz, fO = 644.53 MHz, fSYS = 19.2 MHz TCXO, Holdover Mode

1.0

1.1

1.2

1.3

1.4

1.5

1.6

1.7

1.8

1.9

2.0

FREQUENCY (MHz)

Figure 16. Amplitude vs. Toggle Rate,

HSTL Mode (LVPECL-Compatible Mode)

0.4

0.5

0.6

0.7

0.8

0.9

1.0

100

200

300

400

500

600

700

800

FREQUENCY (MHz)

LVDS BOOST MODE

LVDS DEFAULT

Figure 17. Amplitude vs. Toggle Rate, LVDS

1.0

1.5

2.0

2.5

3.0

3.5

100

150

200

250

300

FREQUENCY (MHz)

3.3V CMOS

1.8V CMOS

Figure 18. Amplitude vs. Toggle Rate with 10 pF Load,

3.3 V (Strong Mode) and 1.8 V CMOS

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