AD9557SLASHPCBZ datasheet(42/92 Pages) AD

42 / 92 page

AD9557

Data Sheet

Rev. A | Page 42 of 92

Table 23 lists a sample EEPROM download instruction

sequence. It illustrates the use of condition instructions and

how they alter the download sequence. The table begins with

the assumption that no conditions are in effect. That is, the

most recently executed condition instruction is either B0 or

no conditional instructions have been processed.

Table 23. EEPROM Conditional Processing Example

Instruction

Action

0x08

0x01

0x00

Transfer the system clock register contents,

regardless of the current condition.

0xB1

Tag Condition 1.

0x19

0x04

0x00

Transfer the clock distribution register contents

only if tag condition = 1.

0xB2

Tag Condition 2.

0xB3

Tag Condition 3.

0x07

0x05

0x00

Transfer the reference input register contents

only if tag condition = 1, 2, or 3.

0x0A

Calibrate the system clock only if tag

condition = 1, 2, or 3.

0xB0

Clear the tag condition board.

0x80

Execute an I/O update, regardless of the

value of the tag condition.

0x0A

Calibrate the system clock, regardless of the

value of the tag condition.

Storing Multiple Device Setups in EEPROM

Conditional processing makes it possible to create a number

of different device setups, store them in EEPROM, and

download a specific setup on demand. To do so, first program

the device control registers for a specific setup. Then, store

an upload sequence in the EEPROM scratch pad with the

following general form:

Condition instruction (B1 to CF) to identify the setup

with a specific condition (1 to 31)

Data instructions (to save the register contents), along

with any required calibrate and/or I/O update instructions

Pause instruction (FE)

With the upload sequence written to the scratch pad,

perform an EEPROM upload (Register 0x0E02, Bit 0).

Reprogram the device control registers for the next desired

setup. Then store a new upload sequence in the EEPROM

scratch pad with the following general form:

Condition instruction (B0)

The next desired condition instruction (B1 to CF, but

different from the one used during the previous

upload to identify a new setup)

Data instructions (to save the register contents) along

with any required calibrate and/or I/O update

instructions

Pause instruction (FE)

With the upload sequence written to the scratch pad, perform

an EEPROM upload (Register 0x0E02, Bit 0).

Repeat the process of programming the device control registers

for a new setup, storing a new upload sequence in the EEPROM

scratch pad (Step 1 through Step 4), and executing an EEPROM

upload (Register 0x0E02, Bit 0) until all of the desired setups

have been uploaded to the EEPROM.

Note that, on the final upload sequence stored in the scratch

pad, the pause instruction (FE) must be replaced with an end

instruction (FF).

To download a specific setup on demand, first store the

condition associated with the desired setup in Register 0x0E01,

Bits[4:0]. Then perform an EEPROM download (Register

0x0E03, Bit 1). Alternatively, to download a specific setup at

power-up, apply the required logic levels necessary to encode

the desired condition on the M2 to M3 multifunction pins.

Then power up the device; an automatic EEPROM download

occurs. The condition (as established by the M2 to M3

multifunction pins) guides the download sequence and results

in a specific setup.

Keep in mind that the number of setups that can be stored

in the EEPROM is limited. The EEPROM can hold a total of

2048 bytes. Each nondata instruction requires one byte of

storage. Each data instruction, however, requires N + 4 bytes of

storage, where N is the number of transferred register bytes and

the other four bytes include the data instruction itself (one

byte), the target address (two bytes), and the checksum

calculated by the EEPROM controller during the upload

sequence (one byte).

Programming the EEPROM to Configure an M Pin to

Control Synchronization of the Clock Distribution

A special EEPROM loading sequence is required to use the

EEPROM to load the registers and to use an M pin to

enable/disable outputs.

To control the output sync function by using an M pin, perform

the following steps:

Enable the M pins by writing Register 0x0200 = 0x01.

Issue an I/O update (Register 0x0005 = 0x01).

Set the appropriate M pin function (see the Clock

Distribution Synchronization section for details).

If this sequence is not performed, a SYNC pulse is issued

automatically.

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