AD9557SLASHPCBZ datasheet(29/92 Pages) AD

29 / 92 page

Data Sheet

AD9557

Rev. A | Page 29 of 92

REFERENCE CLOCK INPUTS

Two pairs of pins provide access to the reference clock receivers.

To accommodate input signals with slow rising and falling edges,

both the differential and single-ended input receivers employ

hysteresis. Hysteresis also ensures that a disconnected or

floating input does not cause the receiver to oscillate.

When configured for differential operation, the input receivers

accommodate either ac- or dc-coupled input signals. The input

receivers are capable of accepting dc-coupled LVDS and 2.5 V

and 3.3 V LVPECL signals. The receiver is internally dc biased

to handle ac-coupled operation, but there is no internal 50 Ω or

100 Ω termination.

When configured for single-ended operation, the input

receivers exhibit a pull-down load of 45 kΩ (typical). Three

user-programmable threshold voltage ranges are available for

each single-ended receiver.

REFERENCE MONITORS

The accuracy of the input reference monitors depends on

a known and accurate system clock period. Therefore, the

functioning of the reference monitors is not operable until the

system clock is stable.

Reference Period Monitor

Each reference input has a dedicated monitor that repeatedly

measures the reference period. The AD9557 uses the reference

period measurements to determine the validity of the reference

based on a set of user-provided parameters in the profile register

area of the register map.

The monitor works by comparing the measured period of a

particular reference input with the parameters stored in the profile

include the reference period, an inner tolerance, and an outer

tolerance. A 40-bit number defines the reference period in units

of femtoseconds (fs). The 40-bit range allows for a reference period

entry of up to 1.1 ms. A 20-bit number defines the inner and outer

tolerances. The value stored in the register is the reciprocal of the

tolerance specification. For example, a tolerance specification of

50 ppm yields a register value of 1/(50 ppm) = 1/0.000050 =

20,000 (0x04E20).

The use of two tolerance values provides hysteresis for the monitor

decision logic. The inner tolerance applies to a previously faulted

reference and specifies the largest period tolerance that a previously

faulted reference can exhibit before it qualifies as nonfaulted.

The outer tolerance applies to an already nonfaulted reference.

It specifies the largest period tolerance that a nonfaulted reference

can exhibit before being faulted.

To produce decision hysteresis, the inner tolerance must be less

than the outer tolerance. That is, a faulted reference must meet

tighter requirements to become nonfaulted than a nonfaulted

reference must meet to become faulted.

Reference Validation Timer

Each reference input has a dedicated validation timer. The

validation timer establishes the amount of time that a previously

faulted reference must remain unfaulted before the AD9557

declares it valid. The timeout period of the validation timer is

programmable via a 16-bit register. The 16-bit number stored in

the validation register represents units of milliseconds (ms),

which yields a maximum timeout period of 65,535 ms.

It is possible to disable the validation timer by programming the

validation timer to 0b. With the validation timer disabled, the

user must validate a reference manually via the manual

reference validation override controls register (Address

0x0A0B).

Reference Validation Override Control

The user also has the ability to override the reference validation

logic and can either force an invalid reference to be treated as valid,

or force a valid reference to be treated as an invalid reference.

These controls are in Register 0x0A0B to Register 0x0A0D.

REFERENCE PROFILES

The AD9557 has an independent profile for each reference input.

A profile consists of a set of device parameters such as the R divider

and N divider, among others. The profiles allow the user to

prescribe the specific device functionality that should take effect

when one of the input references becomes the active reference.

The AD9557 evaluation software includes a frequency planning

wizard that can configure the profile parameters, given the input

and output frequencies.

The user should not change a profile that is currently in use

because unpredictable behavior may result. The user can either

select free run or holdover mode, or invalidate the reference input

prior to changing it.

REFERENCE SWITCHOVER

An attractive feature of the AD9557 is its versatile reference

switchover capability. The flexibility of the reference switchover

functionality resides in a sophisticated prioritization algorithm

that is coupled with register-based controls. This scheme provides

the user with maximum control over the state machine that

handles reference switchover.

The main reference switchover control resides in the loop

mode register (Address 0x0A01). The REF switchover mode

bits (Register 0x0A01, Bits[4:2]) allow the user to select one

of the five operating modes of the reference switchover state

machine, as follows:

•

Automatic revertive mode

•

Automatic non-revertive mode

•

Manual with automatic fallback mode

•

Manual with holdover mode

•

Full manual mode (without auto-holdover)

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