AD9557SLASHPCBZ datasheet(81/92 Pages) AD

81 / 92 page

Data Sheet

AD9557

Rev. A | Page 81 of 92

Table 93. IRQ Clearing for History Update, Frequency Limit, and Phase Slew Limit

Address

Bits

Bit Name

Description

[7:5]

Reserved

History updated

Clears history updated IRQ

Frequency unclamped

Clears frequency unclamped IRQ

Frequency clamped

Clears frequency clamped IRQ

Phase slew unlimited

Clears phase slew unlimited IRQ

0x0A07

Phase slew limited

Clears phase slew limited IRQ

Table 94. IRQ Clearing for Reference Inputs

Address

Bits

Bit Name

Description

Reserved

REFB validated

Clears REFB validated IRQ

REFB fault cleared

Clears REFB fault cleared IRQ

REFB fault

Clears REFB fault IRQ

Reserved

REFA validated

Clears REFA validated IRQ

REFA fault cleared

Clears REFA fault cleared IRQ

0x0A08

REFA fault

Clears REFA fault IRQ

0x0A09

[7:0]

Reserved

Incremental Phase Offset Control and Manual Reference Validation (Register 0x0A0A to Register 0x0A0D)

Table 95. Incremental Phase Offset Control

Address

Bits

Bit Name

Description

[7:3]

Reserved

Reset phase offset

Resets the incremental phase offset to zero.

This is an autoclearing bit.

Decrement phase

offset

Decrements the incremental phase offset by the amount specified in the Incremental phase

lock offset step size register (Register 0x0312 to Register 0x0313).

This is an autoclearing bit.

0x0A0A

Increment phase

offset

Increments the incremental phase offset by the amount specified in the Incremental phase

lock offset step size register (Register 0x0312 to Register 0x0313).

This is an autoclearing bit.

Table 96. Manual Reference Validation

Address

Bits

Bit Name

Description

[7:2]

Reserved

Reserved.

Force Timeout B

Setting this autoclearing bit emulates timeout of the validation timer for Reference B and allows

the user to make REFB valid immediately.

0x0A0B

Force Timeout A

Setting this autoclearing bit emulates timeout of the validation timer for Reference A and allows

the user to make REFA valid immediately.

[7:2]

Reserved

Reserved.

Ref Mon Override B

Overrides the reference monitor REF FAULT signal for Reference B. Setting this bit forces REFB to be

invalid and is a useful way to force a reference switch away from REFB (default: 0b).

0x0A0C

Ref Mon Override A

Overrides the reference monitor REF FAULT signal for Reference A. Setting this bit forces REFA to be

invalid and is a useful way to force a reference switch away from REFA (default: 0).

[7:2]

Reserved

Reserved.

Ref Mon Bypass B

Setting this bit bypasses the reference monitor for Reference B and starts the REFB validation timer.

By first setting this bit, and then setting the Force Timeout B bit, REFB is valid for use by the DPLL.

However, the user should not set this bit at exactly the same time as the force timeout bit

(default: 0).

0x0A0D

Ref Mon Bypass A

Setting this bit bypasses the reference monitor for Reference A and starts the REFA validation timer.

By first setting this bit, and then setting the Force Timeout B bit, REFA is valid for use by the DPLL.

However, the user should not set this bit at exactly the same time as the force timeout bit

(default: 0).

AD9557/PCBZ датащи(PDF) 81 Page - Analog Devices

AD9557/PCBZ датащи(HTML) 81 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

датащи скачать

ссылки URL