AD9557SLASHPCBZ datasheet(1/92 Pages) AD

номер детали	AD9557/PCBZ

подробное описание детали	Dual Input Multiservice

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Dual Input Multiservice

Line Card Adaptive Clock Translator

Data Sheet

AD9557

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other

rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

www.analog.com

Fax: 781.461.3113

FEATURES

Supports GR-1244 Stratum 3 stability in holdover mode

Supports smooth reference switchover with virtually

no disturbance on output phase

Supports Telcordia GR-253 jitter generation, transfer, and

tolerance for SONET/SDH up to OC-192 systems

Supports ITU-T G.8262 synchronous Ethernet slave clocks

Supports ITU-T G.823, G.824, G.825, and G.8261

Auto/manual holdover and reference switchover

2 reference inputs (single-ended or differential)

Input reference frequencies: 2 kHz to 1250 MHz

Reference validation and frequency monitoring (1 ppm)

Programmable input reference switchover priority

20-bit programmable input reference divider

2 pairs of clock output pins, with each pair configurable as

a single differential LVDS/HSTL output or as 2 single-ended

CMOS outputs

Output frequencies: 360 kHz to 1250 MHz

Programmable 17-bit integer and 24-bit fractional

feedback divider in digital PLL

Programmable digital loop filter covering loop bandwidths

from 0.1 Hz to 5 kHz (2 kHz maximum for <0.1 dB of peaking)

Low noise system clock multiplier

Frame sync support

Adaptive clocking

Optional crystal resonator for system clock input

On-chip EEPROM to store multiple power-up profiles

Pin program function for easy frequency translation

configuration

Software controlled power-down

40-lead, 6 mm × 6 mm, LFCSP package

APPLICATIONS

Network synchronization, including synchronous Ethernet

and SDH to OTN mapping/demapping

Cleanup of reference clock jitter

SONET/SDH clocks up to OC-192, including FEC

Stratum 3 holdover, jitter cleanup, and phase transient control

Wireless base station controllers

Cable infrastructure

Data communications

GENERAL DESCRIPTION

The AD9557 is a low loop bandwidth clock multiplier that

provides jitter cleanup and synchronization for many systems,

including synchronous optical networks (SONET/SDH). The

AD9557 generates an output clock synchronized to up to four

external input references. The digital PLL allows for reduction

of input time jitter or phase noise associated with the external

references. The digitally controlled loop and holdover circuitry

of the AD9557 continuously generates a low jitter output clock

even when all reference inputs have failed.

The AD9557 operates over an industrial temperature range of

−40°C to +85°C. If more inputs/outputs are needed, refer to the

AD9558 for the four-input/six-output version of the same part.

FUNCTIONAL BLOCK DIAGRAM

REFERENCE INPUT

AND

MONITOR MUX

STATUS AND

CONTROL PINS

SERIAL INTERFACE

(SPI OR I2C)

EEPROM

DIGITAL

PLL

CLOCK

MULTIPLIER

STABLE

SOURCE

AD9557

ANALOG

PLL

CHANNEL 0

DIVIDER

CHANNEL 1

DIVIDER

÷3 TO ÷11

HF DIVIDER 0

÷3 TO ÷11

HF DIVIDER 1

Figure 1.

Аналогичный номер детали - AD9557/PCBZ

производитель	номер детали	датащи	подробное описание детали
Analog Devices	AD9557	1Mb / 95P	Dual Input Multiservice Line Card Adaptive Clock Translator 9/2016-Rev. B to Rev. C
	AD9557BCPZ	1Mb / 95P	Dual Input Multiservice Line Card Adaptive Clock Translator 9/2016-Rev. B to Rev. C
	AD9557BCPZ-REEL7	1Mb / 95P	Dual Input Multiservice Line Card Adaptive Clock Translator 9/2016-Rev. B to Rev. C
	AD9557	1Mb / 95P	Dual Input Multiservice Line Card Adaptive Clock Translator 9/2016-Rev. B to Rev. C

More results

Аналогичное описание - AD9557/PCBZ

производитель	номер детали	датащи	подробное описание детали
Fuji Electric	FW4560	308Kb / 2P	Multiservice Provisioning Platform
Vitesse Semiconductor C...	VSC9128	492Kb / 2P	Enhanced 2.5,10 Gbps Multiservice SONET/SDH VC Mapper
Analog Devices	AD9551	799Kb / 40P	Multiservice Clock Generator REV. B
	AD9558	1Mb / 104P	Quad Input Multiservice Line Card Adaptive REV. A
	AD9559BCPZ	1Mb / 120P	Dual PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator REV. 0
Motorola, Inc	MC54F74153	67Kb / 3P	DUAL 4-INPUT DUAL 4-INPUT
Analog Devices	AD9554	1Mb / 116P	Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator 3/2017-Rev. C to Rev. D
	AD9554-1	927Kb / 99P	Quad PLL, Quad Input, Multiservice Line Card Adaptive Clock Translator 3/2017-Rev. B to Rev. C
	AD9557	1Mb / 95P	Dual Input Multiservice Line Card Adaptive Clock Translator 9/2016-Rev. B to Rev. C
	AD9558	1Mb / 105P	Quad Input Multiservice Line Card Adaptive Clock Translator with Frame Sync 7/2016-Rev. B to Rev. C

More results

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