AD9557SLASHPCBZ datasheet(10/92 Pages) AD

номер детали	AD9557/PCBZ

подробное описание детали	Dual Input Multiservice

PDF	92 Pages

Scroll/Zoom	100%

производитель	AD [Analog Devices]

домашняя страница	http://www.analog.com

Logo

10 / 92 page

AD9557

Data Sheet

Rev. A | Page 10 of 92

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

OUTPUT TIMING SKEW

10 pF load

Between OUT0 and OUT1

HSTL mode on both drivers; rising edge only;

any divide value

Additional Delay on One Driver by

Changing Its Logic Type

HSTL to LVDS

−5

Positive value indicates that the LVDS edge is

delayed relative to HSTL

HSTL to 1.8 V CMOS

−5

Positive value indicates that the CMOS edge is

delayed relative to HSTL

OUT1 HSTL to OUT0 3.3 V CMOS,

Strong Mode

3.53

3.59

The CMOS edge is delayed relative to HSTL

1 The listed values are for the slower edge (rise or fall).

TIME DURATION OF DIGITAL FUNCTIONS

Table 11.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

TIME DURATION OF DIGITAL FUNCTIONS

EEPROM-to-Register Download Time

Using default EEPROM storage sequence

(see Register 0x0E10 to Register 0x0E3F)

138

145

Using default EEPROM storage sequence

(see Register 0x0E10 to Register 0x0E3F

Minimum Power-Down Exit Time

Time from power-down exit to system clock lock detect

AD9557/PCBZ датащи(PDF) 10 Page - Analog Devices

AD9557/PCBZ датащи(HTML) 10 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

датащи скачать

ссылки URL