AD9557SLASHPCBZ datasheet(75/92 Pages) AD

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Data Sheet

AD9557

Rev. A | Page 75 of 92

Table 69. Distribution Channel 0 Divider Setting

Address

Bits

Bit Name

Description

0x0502

[7:0]

Channel 0 divider

10-bit Channel 0 divider, Bits[7:0] (LSB).

Division equals Channel 0 divider, Bits[9:0] + 1.

([9:0] = 0 is divide-by-1, [9:0] = 1 is divide-by-2…[9:0] = 1023 is divide-by-1024)

0x0503

[7:4]

Reserved

Channel 0 PD

0 (default) = normal operation.

1 = powers down Channel 0.

Select RF divider for Channel 2

1 = selects RF Divider 2 as prescaler for Channel 0 divider.

0 (default) =selects RF Divider 1 as prescaler for Channel 0 divider.

[1:0]

Channel 0 divider

10-bit channel divider, Bits[9:8] (MSB).

[7:6]

Reserved

Reserved.

0x0504

[5:0]

Channel 0 divider phase

Divider initial phase after sync relative to the divider input clock (from the RF divider

output). LSB is ½ of a period of the divider input clock.

Phase = 0 is no phase offset.

Phase = 1 is ½ a period offset.

Table 70. Distribution OUT1 Setting

Address

Bits

Bit Name

Description

Reserved

Reserved.

[6:4]

OUT1 format

These bits set the OUT1 driver mode.

000 = PD, tristate.

001 (default) = HSTL.

010 = LVDS.

011 = reserved.

100 = CMOS, both outputs active.

101 = CMOS, P output active, N output PD.

110 = CMOS, N output active, P output PD.

111 = reserved.

[3:2]

OUT1 polarity

These bits configure the OUT1 polarity in CMOS mode and are active only in CMOS mode.

00 (default) = positive, negative.

01 = positive, positive.

10 = negative, positive.

11 = negative, negative.

OUT1 drive strength

Controls the output drive capability of OUT1.

0 (default) = LVDS: 3.5 mA nominal.

1 = LVDS: 4.5 mA nominal (LVDS boost mode).

No CMOS control because OUT1 is 1.8 V CMOS only.

0x0505

Enable OUT1

Setting this bit enables the OUT1 driver (default is disabled).

0x0506

[7:0]

Reserved

Reserved.

Table 71. Distribution Channel 1 Divider Setting

Address

Bits

Bit Name

Description

0x0507

[7:0]

Channel 1 divider

The same control for Channel 1 divider as in Register 0x0502 for Channel 0 divider

0x0508

[7:0]

Channel 1 divider

The same control for Channel 1 divider as in Register 0x0503 for Channel 0 divider

0x0509

[7:0]

Channel 1 divider

The same control for Channel 1 divider as in Register 0x0504 for Channel 0 divider

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