AD9557SLASHPCBZ datasheet(88/92 Pages) AD

88 / 92 page

AD9557

Data Sheet

Rev. A | Page 88 of 92

Table 116. EEPROM Storage Sequence for Reference Input Settings

Address

Bits

Bit Name

Description

0x0E24

[7:0]

Reference inputs

The default value of this register is 0x03, which the controller interprets as a data instruction. Its

decimal value is 3, so this tells the controller to transfer four bytes of data (3 + 1), beginning at the

address specified by the next two bytes. The controller stores 0x03 in the EEPROM and increments

the EEPROM address pointer.

0x0E25

[7:0]

0x0E26

[7:0]

The default value of these two registers is 0x0600. Note that Register 0x0E25 and Register 0x0E26

are the most significant and least significant bytes of the target address, respectively. Because the

previous register contains a data instruction, these two registers define a starting address (in this

case, 0x0600). The controller stores 0x0600 in the EEPROM and increments the EEPROM pointer by 2.

It then transfers four bytes from the register map (beginning at Address 0x0600) to the EEPROM

and increments the EEPROM address pointer by 5 (four data bytes and one checksum byte). The

four bytes transferred correspond to the reference inputs parameters in the register map.

Table 117. Reserved

Address

Bits

Bit Name

Description

0x0E27

[7:0]

Reserved

Reserved.

0x0E28

[7:0]

0x0E29

[7:0]

Reserved

Reserved.

Table 118. EEPROM Storage Sequence for REFA Profile Settings

Address

Bits

Bit Name

Description

0x0E2A

[7:0]

REFA profile

The default value of this register is 0x26, which the controller interprets as a data instruction. Its

decimal value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at

the address specified by the next two bytes. The controller stores 0x26 in the EEPROM and

increments the EEPROM address pointer.

0x0E2B

[7:0]

0x0E2C

[7:0]

The default value of these two registers is 0x0700. Note that Register 0x0E2B and Register 0x0E2C

are the most significant and least significant bytes of the target address, respectively. Because the

previous register contains a data instruction, these two registers define a starting address (in this

case, 0x0700). The controller stores 0x0700 in the EEPROM and increments the EEPROM pointer by 2.

It then transfers 39 bytes from the register map (beginning at Address 0x0700) to the EEPROM

and increments the EEPROM address pointer by 40 (39 data bytes and one checksum byte).

The 39 bytes transferred correspond to the REFA profile parameters in the register map.

Table 119. EEPROM Storage Sequence for REFB Profile Settings

Address

Bits

Bit Name

Description

0x0E2D

[7:0]

REFB profile

The default value of this register is 0x26, which the controller interprets as a data instruction. Its

decimal value is 38, so this tells the controller to transfer 39 bytes of data (38 + 1), beginning at

the address specified by the next two bytes. The controller stores 0x26 in the EEPROM and

increments the EEPROM address pointer.

0x0E2E

[7:0]

0x0E2F

[7:0]

The default value of these two registers is 0x0740. Note that Register 0x0E2E and Register 0x0E2F

are the most significant and least significant bytes of the target address, respectively. Because the

previous register contains a data instruction, these two registers define a starting address (in this

case, 0x0740). The controller stores 0x0740 in the EEPROM and increments the EEPROM pointer by 2.

It then transfers 39 bytes from the register map (beginning at Address 0x0740) to the EEPROM

and increments the EEPROM address pointer by 40 (39 data bytes and one checksum byte). The

39 bytes transferred correspond to the REFB Profile parameters in the register map.

0x0E30 to

0x0E35

[7:0]

Reserved

Reserved.

0x0E36

[7:0]

I/O update

The default value of this register is 0x80, which the controller interprets as an I/O update instruction.

The controller stores 0x80 in the EEPROM and increments the EEPROM address pointer.

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