MPF0900AMBA2ES datasheet(133/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

Because the PF09 does not have control over the DVS transition of the external supply, the MCU must first

request a change on the VLDOxMON set point and then start the voltage transition on the external voltage

supply right after. The system designer must takecommunication delays, as well as voltage slew rates, into

consideration when selecting the masking time for the VLDOxMON.

The LDOx as external voltage monitoring pins can also perform monitoring of larger voltage levels by providing

an external resistive voltage divider to bring the output voltage to a lower input level suitable for the VLDOxMON

inputs.

In order to use the external resistive voltage divider, the VLDOx_RUN[4:0]/VLDOxSTBY[4:0] bits must be set

to the lowest option (0b00000). The external resistive voltage divider must be calculated in such way that the

resulting voltage matches the VREF = 0.5 V.

The formula to calculate the resistor divider is described in Figure 34:

aaa-056076

VREF =

VLDOx_RUN/VLDOx_STBY

= Fixed

= R2 (Vx - VREF)/VREF

Figure 34. External VLDOxMON resistor divider calculation

When using an external resistive voltage divider, R2 must be selected between 1 kΩ and100 kΩ, and resistor

accuracy should be rated 1 % or better to minimize overall monitoring accuracy fallouts.

When the VLDOxMON is not enabled by default in the Power-up sequence, the monitoring block can be

enabled manually via the LDOx enable bits after the external supply has been enabled and is ready to be

monitored. The LDOxRUN_EN bit is used to enable or disable the voltage monitor in the RUN state, and the

LDOxSTBY_EN bit will control the monitoring block during the Monitored STANDBY states.

LDOx_RUN_EN

VLDOxMON monitoring

Disabled

Enabled

Table 178. VLDOxMON enable bit

When the VLDOxMON is enabled manually, a programmable blanking time is provided to allow enough time

for the external supply to ramp up and settle before allowing OV and UV monitoring to detect faults. The

OTP_VLDOxMON_TSET[1:0] bit is used to set the settling period after enabling the VLDOxMON block.

OTP_VLDOxMON_TSET[1:0]

VLDOxMON settling time

250 µs

500 µs

1000 µs

2500 µs

Table 179. VLDOxMON settling time configuration bits

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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