ADFS7124-8BBCPZ datasheet(16/93 Pages) AD

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Data Sheet

ADFS7124-8

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 16 of 93

Table 6. Pin Function Descriptions (Continued)

Pin No.

Mnemonic

Description

DOUT/RDY

Serial Data Output/Data Ready Output. DOUT/RDY functions as a serial data output pin to access the output shift register of the

ADC. The output shift register can contain data from any of the on-chip data or control registers. In addition, DOUT/RDY operates as

a data ready pin, going low to indicate the completion of a conversion. If the data is not read after the conversion, the pin goes high

before the next update occurs. The DOUT/RDY falling edge can also be used as an interrupt to a processor, indicating that valid

data is available. With an external serial clock, the data can be read using the DOUT/RDY pin. When CS is low, the data/control

word information is placed on the DOUT/RDY pin on the SCLK falling edge and is valid on the SCLK rising edge.

DIN

Serial Data Input to the Input Shift Register on the ADC. Data in the input shift register is transferred to the control registers within

the ADC, with the register selection bits of the communications register identifying the appropriate register.

SCLK

Serial Clock Input. This serial clock input is for data transfers to and from the ADC. The SCLK pin has a Schmitt-triggered input,

making the interface suitable for opto-isolated applications. The serial clock can be continuous with all data transmitted in a

continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information being transmitted to or from the ADC in

smaller batches of data.

CLK

Clock Input/Clock Output. The internal clock can be made available at this pin. Alternatively, the internal clock can be disabled, and

the ADC can be driven by an external clock. This allows several ADCs to be driven from a common clock, allowing simultaneous

conversions to be performed.

Chip Select Input. This is an active low logic input that selects the ADC. Use CS to select the ADC in systems with more than one

device on the serial bus or as a frame synchronization signal in communicating with the device. CS can be hardwired low if the

serial peripheral interface (SPI) diagnostics are unused, allowing the ADC to operate in 3-wire mode with SCLK, DIN, and DOUT

interfacing with the device.

Exposed Pad. Connect the exposed pad to AVSS.

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