ADFS7124-8BBCPZ datasheet(3/93 Pages) AD

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Data Sheet

ADFS7124-8

GENERAL DESCRIPTION

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Rev. 0 | 3 of 93

The ADFS7124-8 is a low power, low noise, completely integrated

analog front end for high precision measurement applications. The

device contains a low noise, 24-bit Σ-Δ analog-to-digital converter

(ADC), and can be configured to have 8 differential inputs or 15

single-ended or pseudo differential inputs. The on-chip low gain

stage ensures that signals of small amplitude can be interfaced

directly to the ADC.

One of the major advantages of the ADFS7124-8 is that it gives the

user the flexibility to employ one of three integrated power modes.

The current consumption, range of output data rates, and RMS

noise can be tailored with the power mode selected. The device

also offers a multitude of filter options, ensuring the highest degree

of flexibility.

The ADFS7124-8 can achieve simultaneous 50 Hz and 60 Hz

rejection when operating at an output data rate of 25 SPS (single

cycle settling), with rejection in excess of 80 dB achieved at lower

output data rates.

The ADFS7124-8 establishes the highest degree of signal chain

integration. The device contains a precision, low noise, low drift in-

ternal band gap reference and accepts an external differential

reference, which can be internally buffered. Other key integrated

features include programmable low drift excitation current sources,

burnout currents, and a bias voltage generator, which sets the

common-mode voltage of a channel to AVDD/2. The low-side power

switch enables the user to power down bridge sensors between

conversions, ensuring the absolute minimal power consumption of

the system. The device also allows the user the option of operating

with either an internal or external clock.

The integrated channel sequencer allows several channels to be

enabled simultaneously, and the ADFS7124-8 sequentially converts

on each enabled channel, simplifying communication with the de-

vice. As many as 16 channels can be enabled at any time, a

channel being defined as an analog input or a diagnostic such

as a power supply check or a reference check. This unique fea-

ture allows diagnostics to be interleaved with conversions. The

ADFS7124-8 also supports per channel configuration. The device

allows eight configurations or setups. Each configuration consists of

gain, filter type, output data rate, buffering, and reference source.

The user can assign any of these setups on a channel-by-channel

basis.

The ADFS7124-8 also has extensive diagnostic functionality inte-

grated as part of its comprehensive feature set. These diagnostics

include a cyclic redundancy check (CRC), signal chain checks,

and serial interface checks, which lead to a more robust solution.

These diagnostics reduce the need for external components to

implement diagnostics, resulting in reduced board space needs,

reduced design cycle times, and cost savings. The failure modes

effects and diagnostic analysis (FMEDA) of a typical application has

shown a safe failure fraction (SFF) greater than 90% according to

IEC 61508.

The device operates with a single analog power supply from 2.7

V to 3.6 V or a dual 1.8 V power supply. The digital supply has a

range of 1.65 V to 3.6 V. It is specified for a temperature range of

−40°C to +125°C. The ADFS7124-8 is housed in a 32-lead LFCSP

package.

Note that, throughout this data sheet, multifunction pins, such as

DOUT/RDY, are referred to either by the entire pin name or by a

single function of the pin, for example, RDY, when only that function

is relevant.

Table 1. ADFS7124-8 Overview

Parameter

Low Power Mode

Mid Power Mode

Full Power Mode

Maximum Output Data Rate

2400 SPS

4800 SPS

19,200 SPS

RMS Noise (Gain = 128)

24 nV

20 nV

23 nV

Peak-to-Peak Resolution at 1200 SPS (Gain = 1) 16.4 bits

17.1 bits

18 bits

Typical Current (ADC + PGA)

255 µA

355 µA

930 µA

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