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ADFS7124-8BBCPZ датащи(PDF) 75 Page - Analog Devices |
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ADFS7124-8BBCPZ датащи(HTML) 75 Page - Analog Devices |
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75 / 93 page ![]() Data Sheet ADFS7124-8 APPLICATIONS INFORMATION analog.com Rev. 0 | 75 of 93 The external antialias filter is omitted for clarity. However, such a filter is required to reject any interference at the modulator frequen- cy and multiples of the modulator frequency. In addition, some filtering may be needed for EMI purposes. Both the analog inputs and reference inputs can be buffered, which allows the user to connect any RC combination to the reference or analog input pins. Note that the reference inputs require 100 mV of headroom when buffered so a headroom resistor is then needed to bias REFIN2(−) appropriately. The required power mode depends on the performance required from the system along with the current consumption allowance for the system. In a field transmitter, low current consumption is essen- tial. In this application, the low power mode or mid power mode is most suitable. In process control applications, power consumption is not a priority. Thus, full power mode may be selected. The full power mode offers higher throughput and lower noise. The ADFS7124-8 on-chip diagnostics allow the user to check the circuit connections, monitor power supply, reference, and LDO vol- tages, check all conversions and calibrations for any errors, as well as monitor any read/write operations. In thermocouple applications, the circuit connections are verified using the reference detect and burnout currents. The REF_DET_ERR flag is set if the external reference REFIN2(±) is missing. The burnout currents (available in the configuration registers) detect an open wire. For example, if the thermocouple is not connected and the burnout currents are enabled on the channel, the ADC outputs a conversion that is equal to or close to full scale. For best performance, enable the burnout currents periodically to check the connections but disable them as soon as the connections are verified for they add an error to the conversions. The decoupling capacitors on the LDOs can also be checked. The ADC indicates if the capacitor is not present. As part of the conversion process, the analog input overvoltage/un- dervoltage monitors are useful for detecting any excessive voltages on AINP and AINM. The power supply voltages and reference voltages are selectable as inputs to the ADC. Thus, the voltages can be periodically checked to confirm whether they are within the system specification. Also, it is possible to check that the LDO voltages are within specification. The conversion process and calibration process can also be checked. This ensures that any invalid conversions or calibrations are flagged. Finally, the CRC check, SCLK counter, and the SPI read/write checks make the interface more robust as any read/write operation that is not valid is detected. The CRC check highlights if any bits are corrupted when being transmitted between the processor and the ADC. TEMPERATURE MEASUREMENT USING AN RTD To optimize a 3-wire RTD configuration, two identically matched current sources are required. The ADFS7124-8, which contains two well matched current sources, is ideally suited to these applications. One possible 3-wire configuration is shown in Figure 127. In this 3-wire configuration, the lead resistances result in errors if only one current (output at AIN0) is used, as the excitation current flows through RL1, developing a voltage error between AIN1 and AIN2. In the scheme outlined, the second RTD current source (available at AIN3) compensates for the error introduced by the excitation current flowing through RL1. The second RTD current flows through RL2. Assuming that RL1 and RL2 are equal (the leads are normally of the same material and of equal length) and that the excitation currents match, the error voltage across RL2 equals the error volt- age across RL1, and no error voltage is developed between AIN1 and AIN2. Twice the voltage is developed across RL3; however, because this is a common-mode voltage it does not introduce errors. The reference voltage for the ADFS7124-8 is also generated using one of the matched current sources. It is developed using a precision resistor and applied to the differential reference pins of the ADC. This scheme ensures that the analog input voltage span remains ratiometric to the reference voltage. Any errors in the analog input voltage due to the temperature drift of the excitation current are compensated by the variation of the reference voltage. As an example, the PT100 measures temperature from −200°C to +600°C. The resistance is 100 Ω typically at 0°C and 313.71 Ω at 600°C. If the 500 µA excitation currents are used, the maximum voltage generated across the RTD when using the full temperature range of the RTD is: 500 µA × 313.71 Ω = 156.86 mV This is amplified to 2.51 V within the ADFS7124-8 if the gain is programmed to 16. The voltage generated across the reference resistor must be at least 2.51 V. Therefore, the reference resistor value must equal at least: 2.51 V/500 µA = 5020 Ω Therefore, a 5.11 kΩ resistor can be used. 5.11 kΩ × Excitation Current = 5.11 kΩ × 500 µA = 2.555 V One other consideration is the output compliance. The output com- pliance equals AVDD − 0.37 V. If a 3.3 V analog supply is used, the voltage at AIN0 must be less than (3.3 V − 0.37 V) = 2.93 V. From the previous calculations, this specification is met because the maximum voltage at AIN0 equals the voltage across the reference resistor plus the voltage across the RTD, which equals: 2.555 V + 156.86 mV = 2.712 V A typical procedure for reading the RTD is as follows: 1. Reset the ADC. 2. Select the power mode. 3. Set the CHANNEL_0 register analog input to AIN1/AIN2. As- sign Setup 0 to this channel. Configure Setup 0 to have a gain of 16 and select the reference source REFIN2(±). Select the filter type and set the output data rate. |
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