ADFS7124-8BBCPZ datasheet(90/93 Pages) AD

90 / 93 page

Data Sheet

ADFS7124-8

ON-CHIP REGISTERS

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Rev. 0 | 90 of 93

Table 73. Channel Register Bit Descriptions (Continued)

Bits

Bit Name

Description

00011 = AIN3.

00100 = AIN4.

00101 = AIN5.

00110 = AIN6.

00111 = AIN7.

01000 = AIN8.

01001 = AIN9.

01010 = AIN10.

01011 = AIN11.

01100 = AIN12.

01101 = AIN13.

01110 = AIN14.

01111 = AIN15.

10000 = temperature sensor.

10001 = AVSS.

10010 = internal reference.

10011 = DGND.

10100 = (AVDD − AVSS)/6+. Use in conjunction with (AVDD − AVSS)/6− to monitor supply AVDD − AVSS.

10101 = (AVDD − AVSS)/6−. Use in conjunction with (AVDD − AVSS)/6+ to monitor supply AVDD − AVSS.

10110 = (IOVDD − DGND)/6+. Use in conjunction with (IOVDD − DGND)/6− to monitor IOVDD − DGND.

10111 = (IOVDD − DGND)/6−. Use in conjunction with (IOVDD − DGND)/6+ to monitor IOVDD − DGND.

11000 = (ALDO − AVSS)/6+. Use in conjunction with (ALDO − AVSS)/6− to monitor the analog LDO.

11001 = (ALDO − AVSS)/6−. Use in conjunction with (ALDO − AVSS)/6+ to monitor the analog LDO.

11010 = (DLDO − DGND)/6+. Use in conjunction with (DLDO − DGND)/6− to monitor the digital LDO.

11011 = (DLDO − DGND)/6−. Use in conjunction with (DLDO − DGND)/6+ to monitor the digital LDO.

11100 = V_20MV_P. Use in conjunction with V_20MV_M to apply a 20 mV p-p signal to the ADC.

11101 = V_20MV_M. Use in conjunction with V_20MV_P to apply a 20 mV p-p signal to the ADC.

11110 = Reserved.

11111 = Reserved.

CONFIGURATION REGISTERS

RS[5:0] = 0, 1, 1, 0, 0, 1 to 1, 0, 0, 0, 0, 0

Power-On/Reset = 0x0860

The ADFS7124-8 has eight configuration registers, CONFIG_0 to CONFIG_7. Each configuration register is associated with a setup;

CONFIG_x is associated with Setup x. In the configuration register, the reference source, polarity, reference buffers are configured. Table 74

outlines the bit designations for the register. Bit 15 is the first bit of the data stream. The number in parentheses indicates the power-on/ reset

default status of that bit.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

0 (0)

Bipolar (1)

Burnout (0)

REF_BUFP (0)

REF_BUFM (0)

AIN_BUFP (1)

AIN_BUFM (1)

REF_SEL (0)

PGA (0)

Table 74. Configuration Register Bit Descriptions

Bits

Bit Name

Description

15:12

These bits must be programmed with a Logic 0 for correct operation.

Bipolar

Polarity select bit. When this bit is set, bipolar operation is selected. When this bit is cleared, unipolar operation is selected.

10:9

Burnout

These bits select the magnitude of the sensor burnout detect current source.

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