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MT9072AB датащи(PDF) 28 Page - Zarlink Semiconductor Inc

номер детали MT9072AB
подробное описание детали  Octal T1/E1/J1 Framer
PDF  275 Pages
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производитель  ZARLINK [Zarlink Semiconductor Inc]
домашняя страница  http://www.zarlink.com
Logo ZARLINK - Zarlink Semiconductor Inc

MT9072AB датащи(HTML) 28 Page - Zarlink Semiconductor Inc

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MT9072
Data Sheet
28
Zarlink Semiconductor Inc.
13
33
53
73
93
113
133
153
F3
L1
R3
T5
T11
M13
H15
C13
RxMF[0]
RxMF[1]
RxMF[2]
RxMF[3]
RxMF[4]
RxMF[5]
RxMF[6]
RxMF[7]
O
Receive Multiframe Boundary. This pin provides a pulse that
identifies basic frame 0 (the start of bit cell 7 of channel 0) of each
received multiframe on the ST-BUS data stream (DSTo). The RxMF
pin operates the same way in 2.048 Mbit/s and 8.196 Mbit/s modes.
Pins RxMF[0-7] are used for Framers[0-7] respectively.
In T1 mode, the RxMF pulse is 244 ns wide and its center identifies
basic frame 0 of the received multiframe. If the Tx8KEN control bit
(Address YF1) is 1 then the RxMF pin outputs an 8kHz frame pulse
synchronous with the data stream on TPOS/TNEG. See Figure 43 and
Figure 45.
In T1 IMA mode, the frame pulse duration is 648 ns.
In E1 mode, (and E1 IMA mode) the RxMF pulse is 244 ns wide and
its center identifies basic frame 0 of the received CAS (Channel
Associated Signaling) multiframe boundary or the received CRC-4
multiframe boundary as determined by the MFSEL control bit
(Address Y02). If the Tx8KEN control bit (Address Y02) is 1 then the
RxMF pin outputs and 8 kHz frame pulse synchronous with the data
stream on TPOS/TNEG. See Figure 62 and Figure 64.
14
94
F4
T12
DSTi[0]
DSTi[4]
I
Data ST-BUS. This pin is an input for the transmit side of the framer. In
2.048 Mbit/s ST-BUS mode and IMA mode it operates the same as
DSTi(1-3), it can also operate in 8.192 Mbit/s ST-BUS mode. IMA
mode is not available at 8.192 Mbit/s. The DSTi data stream is clocked
into the framer by the clock input to pin CKi.
When operated in 8.192 Mbit/s ST-BUS mode this pin accepts a data
stream containing 128 8-bit channels accommodating four framers.
See Table 2 and Table 5. The frame boundary is indicated by the FPi
inputs. Pin DSTi[0] is used by Framers[0-3] and pin DSTi[4] is used by
Framers[4-7].
In 8.192 Mbit/s mode, the 32 ST-BUS channels mapped to each
framer are treated as described for DSTi(1-3) operating at
2.048 Mbit/s.
Pin Description (continued)
Pin #
Name
Type
Description (see Notes 1 to 7)
LQFP
LBGA



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