MT9072AB datasheet(84/275 Pages) ZARLINK

84 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

12.2

T1 In Band Loopback Codes

T1.403 defines SF mode line loopback activate and deactivate codes. These codes are either a framed or

unframed repeating bit sequence of 00001 for activation or 001 for deactivation. The standard goes on to say that

these codes will persist for five seconds or more before the loopback action is taken. The MT9072 will detect both

framed and unframed line activate and de-activate codes even in the presence of a BER of 3 x 10-3. Line Loopback

Disable Detect - LLDD - in the Alarm Status Word (Y10) will be asserted when a repeating 001 pattern (either

framed or unframed) has persisted for 48 milliseconds. Line Loopback Enable Detect LLED in the Alarm Status

Word will be asserted when a repeating 00001 pattern (either framed or unframed) has persisted for 48

milliseconds.

Other loopup and loopdown codes can be selected by writing to Transmit Loop Activate and Loop Deactivate Code

registers(Y0D and Y0E).

The selection of the expected received loopup and loopdown code is done by writing to registers Receive Loopup

Code and Receive Loop Deactivate Code Match registers(Y0F and YF0).

Interrupt status bits LLEDI and LLDDI will be set upon detection of inband loopup or loopdown codes respectively.

Maskable interrupts can be generated by disabling the mask bits in Receive line status and Timer mask (Y45 bit 5).

Address

Description

Y05

Loopback Control

This register contains the loopbacks within the framer.

Y90-YAF

Per Channel Control

RTSL and LTSL are per channel loopbacks.

904

Framer Loopback Global Register This register contains framer to framer loopbacks.

Table 38 - Registers Related to Loopbacks (T1)

Address

Description

Y02

Transmit Alarm Control

If the SO bit is set, there will be framed loop codes, otherwise they will be

unframed.

Y05

Loopback Control

Setting TLU or TLD will cause the transmitter to start sending the

appropriate loopup and loopdown code.

Y0D

Transmit Loop Activate

Code

This register contains the loop activate code which will be sent on the Tx

PCM stream when TLU is set. It also contains 2 bits for code length.

Y0E

Transmit Loop Deactivate

Code

This register contains the loop deactivate code which will be sent on the

Tx PCM stream when TLD is set. It also contains 2 bits for code length.

Y0F

Receive Loop Activate

Code Match

This register contains the loop activate code which will cause an interrupt

if received on the RX PCM stream. It also contains 2 bits for code length.

YF0

Receive Loop Deactivate

Code Match

This register contains the loop deactivate code which we are looking for

on the RX PCM stream. It also contains 2 bits for code length.

Y10

Synchronization and

Alarm Status

LLED and LLDD will be high when their respective loop codes are

detected in the match registers.

Table 39 - Registers Related to In Band Loopbacks (T1)

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