MT9072AB datasheet(80/275 Pages) ZARLINK

80 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

Transmit Error

Insertion

All error insertion controls are

disabled.

L32Z,BPVE,CRCE,FTE,FSE,LOSE,PER

R = 0

Y03

Signaling

All signaling freeze and debounce

functions are disabled and the

transmit signaling type is set such that

A in frame 6 and B in frame 12.

Robbed bit signaling is turned on for

transmitter and receiver.

CSIGEN,RBEN,TSDB,RSDB,RFL,SM1-0

,SIP1-0= hex 200

Y04

Loopbacks

All loopbacks deactivated; ready to

send receive framed in band loopback

codes.

DLBK,RLBK,STLBK,PLBK,TLU,

TLD = 0

Y05

Data Link

Data Link is deactivated, hence bit

oriented message, and HDLC are

also disabled.

#,#,#,#,HCH4:0,HPAYSEL,E1.5CK,

DLCK,EDLEN,BOMEN,HDLCEN,H1R6

4 = 0

Y06

Bit Oriented

Message

Registers

The Transmit Bit oriented message

Match register are cleared.

TxBOM7:0,

RXBOMM7:0 = 0

Y07-Y08

In band loopback

activation codes

The transmit and expected receive

inband loopback codes are set to

T1.403 defaults.

TXLACL1-0,TXLAC7-0 = binary00

00000001

TXLDCL1-0,TXLDC7-0 = binary 01

00001001

RXLACL1-0,RXLACM7-0 =

binary00 00000001

RXLDCL1-0,RXLDCM7-0 =

binary 01 00001001

Y0D-Y0F

YF0

Interrupts and IO

Control

All interrupts are suspended and

CSTO and DSTo enables are off

Tx8KEN,RXDO,TXMFSEL,

SPND,INTA,DSToEN,CSToEN,RxCO,C

NTCLR,SAMPLE,RST = 0

YF1

Latched Status All latched status bits are cleared

Y10-Y2F

Per Channel

Control

Per Channel inversion, Remote

timeslot loopback, local timeslot

loopback,transmit test, receive test,

Clear channel, Receive freeze,

transmit freeze are all turned off

RPCI,MPDR,MPST,TCPI,RTSL,LTSL,TT

ST,RRST,MPDT,CC=0

Y90-YAF

Interrupts Masks

and status

Registers

All interrupts are unmasked.

Receive Sync and Alarm status & Mask,

Counter statusMask, Receive Line Status

Mask, Elastic store status mask and

HDLC Status Mask = 0

Y43 TO

Y46

Function

Status

Control Bits Reset Value

Address

Table 36 - Reset Status (T1)

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