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MT9072AB датащи(PDF) 48 Page - Zarlink Semiconductor Inc |
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MT9072AB датащи(HTML) 48 Page - Zarlink Semiconductor Inc |
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48 / 275 page ![]() MT9072 Data Sheet 48 Zarlink Semiconductor Inc. 5.2 E1 Framing The following Table shows the registers related to the E1 framing algorithm. DSTi/DSTo Channel#, Bit# PCM24 bits Function 0 Not mapped Timeslot 0 1, bit 7(MSB) S-bit S-bit 1(bit 6 to 0)-15 119 bits 16 Not mapped Timeslot 16 17-25 120 to 192 channel 16, bit 1 193 bit last bit Table 10 - G.802 ST-BUS to PCM24 Mapping (T1) Register Address Register Description Y00 Alarm and Framing Control Register This is the main register for selection of the framing mode. The specific bits for control of the framer are CSYN, AUTY, CRCM, REFRM, MFRF and AUTC Y10 Synchronization and Alarm Status Word. This register provides the real time status of receive basic frame synchronization and receive multiframe synchronization. All bits in this status register are relevant to framing except the slip bits. Y11 CRC-4 Timers and CRC-4 Local Status All bits except the 2 sec timer are related to the reception of the CRC-4 pattern in timeslot 0. Y12 Alarm and Multiframe signaling Status This register reports alarms such as AIS, loss of signal and Timeslot 16 and 0 remote alarms. The bits of relevance for framing are KLVE, LOSS,AIS16, AIS,RAI,RMA1 to 4, Y bit. Y13 NFAS and FAS Status Register This register shows the FAS and NFAS status such as RFA 2 to 8 and RNFA. Y16 Loss of basic frame synchronization counter This counter increments by one every 125 usec when the BSYNC status is set to 1. Y19 CRC-4 Error Counter This error counter is incremented for each calculated CRC-4 submultiframe error. The CRCS1 and CRCS2 (Y11 bit 1 and 2) events increment this counter. Y1A FAS Bit Counter and FAS Error Counter. This register reflects the FAS bit errors and a combined FAS pattern error. Y24 Sync,CRC-4,MAS Latched Status Register This register represents the latched version of framing status bits such as BSYNC. These bits are set by changes in the associated real time bits. Table 11 - Registers Related to Framing for MT9072 (E1) |
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