MT9072AB datasheet(40/275 Pages) ZARLINK

40 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

3.0

PCM24 Interface (T1)

3.1

T1 Interface to the System Backplane

PCM24 (T1) basic frames are 193 bits long and are transmitted at a frame repetition rate of 8000 Hz, which results

in an aggregate bit rate of 193 bits x 8000/sec =1.544 Mbits/sec. Basic frames are divided into 24 channels

numbered 1 to 24 and a framing bit; see Figure 4. Each timeslot is 8 bits in length and is transmitted most

significant bit first (numbered bit 1). This results in a single channel data rate of 8 bits x 8000/sec. = 64 kbit/s.

Figure 4 - PCM24 Link Frame Format (T1)

It should be noted that the Zarlink ST-BUS has 32 channels numbered 0 to 31 and the most significant bit of an

eight bit channel is numbered bit 7, see Figure 5. Therefore, ST-BUS bit 7 is synonymous with DS0 bit 1; bit 6 with

bit 2 and so on. See Zarlink Application note MSAN-126 for more details on the ST-BUS.

Figure 5 - ST-BUS Format

In the case of mapping ST-BUS to the PCM24 payload, only the first 24 channels and the last channel (31) of an

ST-BUS are used (see Table 1). Timeslot 31 S-bit is only used if TXSYNC bit Y00 is set. All unused channels are

tristate.

DS1 FRAME

(8/1.544) us

CHANNEL

BIT 1

BIT 2

BIT 3

BIT 4

BIT 5

BIT 6

BIT 7

BIT 8

CHANNEL

BIT

CHANNEL

125 us

(1/1.544) us

• • • • • • • • •

CHANNEL

31 or 127

30 or 126

BIT

CHANNEL

31 or 127

BIT

• • •

Least

Significant

Bit (Last)

Most

Significant

Bit (First)

125

µs

(8/2.048 or 8/8.192)

µs

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