MT9072AB datasheet(41/275 Pages) ZARLINK

41 / 275 page

MT9072

Data Sheet

Zarlink Semiconductor Inc.

The relationship between DSTi/CSTi and the voice channels in 8.192 Mbit/s mode is shown in Table 2 (F01-F7 refer

to the Framer numbers). There are 2 multiplexed streams (DSTi/o0 and CSTi/o0 are used to multiplexed data for

Framers 0 to 3 and DSTi/o4 and CSTi/o4 is used for framers 5 to 7).

When the device is in IMA (Inverse Mux for ATM) mode, the mapping is the S-bit followed by 24 PCM channels.

This relationship is shown in Table 3. Note that the S-bit location in the Table is indicated by the bit number; which

starts from bit 0. Hence the strict definition of ST-BUS channels is not adhered to. As in a T1 interface the data on

the DSTi/o is a bit followed by 24 channels.

When signaling information is written to the MT9072 using ST-BUS control links (as opposed to direct writes by the

microport to the on-board signaling registers), the CSTi channels corresponding to the selected DSTi channel

streams are used to transmit the signaling bits. Since the maximum number of signaling bits associated with any

channel is 4 (in the case of ABCD), only half a CSTi (bits 3 to 0) channel is required for sourcing the signaling bits.

Bit A is bit 3 from the CSTi stream, Bit B is 2, Bit C is 1 and Bit D is 0. Unused channels and unused bits are tristate.

In T1 transparent mode, the DSTi data is transparently sent to the PCM24 channels. In transparent mode the data

on the DSTi streams will appear unaltered on the PCM24 links and data received on the PCM24 link will pass

unaltered to the DSTo streams. No signaling insertion or extraction is done in transparent mode. If the TxSYNC

control bit (address Y00) is 1 then the transmit S-bit is overwritten by channel 31 bit 0 in the 2.048 Mbit/s ST-BUS

mode. In the 8.192 Mbit/s ST-BUS mode the S-bits from channels 124, 125, 126, 127 respectively are used to

override the transmit S-bit positions for Framers 0 to 3 or 4 to 7 respectively. If T1 Transparent mode and IMA mode

are both selected then the S-bit and channel bits are transparently mapped as shown in Table 3.

PCM24 Channels

123456789

ST-BUS Channels

(DSTi/o and CSTi/o)

0123456779

PCM24 Channels

----

S-bit

ST-BUS Channels

(DSTi/o and CSTi/o)

Table 1 - ST-BUS vs. PCM24 Channel Relationship for 2.048 Mbit/s DST/CST Streams (T1)

PCM24 Channels

ST-BUS

F0/4

Chan(DSTi/o

F1/5

and CSTi/o)

F2/6

F3/7

PCM24 Channels

S-bit

----

ST-BUS

F0/4

Chan(DSTi/o

F1/5

and CSTi/o)

F2/6

F3/7

124

125

126

127

Table 2 - ST-BUS Channel vs. PCM24 Channel Relationship for 8.192 Mbit/s DST/CST Streams (T1)

MT9072AB датащи(PDF) 41 Page - Zarlink Semiconductor Inc

MT9072AB датащи(HTML) 41 Page - Zarlink Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL