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LPC55S6X датащи(PDF) 95 Page - NXP Semiconductors |
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LPC55S6X датащи(HTML) 95 Page - NXP Semiconductors |
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95 / 128 page ![]() LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.9 — 10 February 2020 95 of 128 NXP Semiconductors LPC55S6x 32-bit ARM Cortex-M33 microcontroller 11.13 SD/MMC and SDIO Table 35. Dynamic characteristics: SD/MMC and SDIO Tamb = 40 C to +105 C, VDD = 1.8 V to 3.6 V; CL = 10 pF. SAMPLE_DELAY = 0, DRV_DELAY = 0 in the SDDELAY register, SDIOCLKCTRL = 0x84, sampled at 90 % and 10 % of the signal level, SLEW = 1 ns for SD_CLK pin, SLEW = 1 ns for SD_DATn and SD_CMD pins. Simulated values in high-speed mode. Not tested in production. Symbol Parameter Conditions Min Typ Max Unit fclk clock frequency on pin SD_CLK; data transfer mode - - 50 MHz tsu(D) data input set-up time on pins SD_DATn as inputs 15 --ns on pins SD_CMD as inputs 15 --ns th(D) data input hold time on pins SD_DATn as inputs 0 --ns on pins SD_CMD as inputs 0 --ns tv(Q) data output valid time on pins SD_DATn as outputs 3- 7 ns on pins SD_CMD as outputs 3- 7 ns Fig 20. SD/MMC and SDIO timing 002aag204 SD_CLK SD_DATn (O) SD_DATn (I) td(QV) th(D) tsu(D) Tcy(clk) th(Q) SD_CMD (O) SD_CMD (I) |
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