LPC55S6X datasheet(60/128 Pages) NXP

номер детали	LPC55S6X

подробное описание детали	32-bit Arm Cortex짰-M33; M33 coprocessor, TrustZone, PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS,Flexcomm Interface, SDIO, 32-bit counter/ timers,SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC,Comparator, Temperature Sensor, AES, PUF, SHA, CRC, RNG

PDF	128 Pages

Scroll/Zoom	100%

производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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60 / 128 page

LPC55S6x

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.9 — 10 February 2020

60 of 128

NXP Semiconductors

LPC55S6x

32-bit ARM Cortex-M33 microcontroller

• Force a capture of the count value into any capture registers.

• Generate an interrupt of DMA request.

7.28.2.1 Features

• The SCTimer/PWM Supports:

– Eight inputs.

– Ten outputs.

– Sixteen match/capture registers.

– Sixteen events.

– Thirty two states.

• Counter/timer features:

– Each SCTimer/PWM is configurable as two 16-bit counters or one 32-bit counter.

– Counters clocked by system clock or selected input.

– Configurable number of match and capture registers. Up to sixteen match and

capture registers total.

– Sixteen events.

– Thirty two states.

– Upon match and/or an input or output transition create the following events:

interrupt; stop, limit, halt the timer or change counting direction; toggle outputs;

change the state.

– Counter value can be loaded into capture register triggered by a match or

input/output toggle.

• PWM features:

– Counters can be used in conjunction with match registers to toggle outputs and

create time-proportioned PWM signals.

– Up to eight single-edge or four dual-edge PWM outputs with independent duty

cycle and common PWM cycle length.

• Event creation features:

– The following conditions define an event: a counter match condition, an input (or

output) condition such as an rising or falling edge or level, a combination of match

and/or input/output condition.

– Selected events can limit, halt, start, or stop a counter or change its direction.

– Events trigger state changes, output toggles, interrupts, and DMA transactions.

– Match register 0 can be used as an automatic limit.

– In bi-directional mode, events can be enabled based on the count direction.

– Match events can be held until another qualifying event occurs.

• State control features:

– A state is defined by events that can happen in the state while the counter is

running.

– A state changes into another state as a result of an event.

– Each event can be assigned to one or more states.

– State variable allows sequencing across multiple counter cycles.

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