LPC55S6X datasheet(72/128 Pages) NXP

номер детали	LPC55S6X

подробное описание детали	32-bit Arm Cortex짰-M33; M33 coprocessor, TrustZone, PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS,Flexcomm Interface, SDIO, 32-bit counter/ timers,SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC,Comparator, Temperature Sensor, AES, PUF, SHA, CRC, RNG

PDF	128 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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LPC55S6x

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.9 — 10 February 2020

72 of 128

NXP Semiconductors

LPC55S6x

32-bit ARM Cortex-M33 microcontroller

10. Static characteristics

10.1 General operating conditions

[1]

Typical ratings are not guaranteed. The values listed are for room temperature (25

C), nominal supply voltages.

[2]

Device revision 1B operates at a maximum CPU frequency of up to 150 MHz. Device revision 0A operates at a maximum CPU

frequency of up to 100 MHz.

[3]

Flash operations (erase, blank check, program) and reading single word can only be performed for CPU frequencies of up to 100 MHz.

Cannot be performed for frequencies above 100 MHz.

[4]

For device revision 1B, power library in SDK sets the DCDC output based on the frequency selected. For frequencies 100 MHz or

below, DCDC output is set between 1.0 V to 1.075 V, for frequencies between 101 MHz to 130 MHz, DCDC output is set between 1.025

V to 1.150 V and for frequencies above 130 MHz, DCDC output is set between 1.050 V to 1.2 V. For device revision 0A, the default

typical DCDC output is 1.1 V and for device revision 1B, the typical default DCDC output is 1.0 V.

Table 14.

General operating conditions

Tamb = 40 C to +105 C, unless otherwise specified.

Symbol

Parameter

Conditions

Min

Typ[1]

Max

Unit

fclk

clock frequency

internal CPU/system clock

150 [2] [3] MHz

fclk

clock frequency

For USB high-speed device and

host operations

150 [2] [3] MHz

fclk

clock frequency

For USB full-speed device and

host operations

150 [2] [3] MHz

VDD

Main IO supply

1.8

3.6

VBAT_DCDC

Supply of DCDC output stage.

DCDC core supply (references

and regulation stages)

1.8

3.6

VBAT_PMU

Analog supply

1.8

3.6

VDD_PMU [4]

Analog supply for Core. DCDC

output

1.0

1.2

USB0_3V3

USB0 analog 3.3 V supply.

3.0

3.6

USB1_3V3

USB1 analog 3.3 V supply.

3.0

3.6

VDDA

Analog supply voltage for ADC

1.8

3.6

Vrefp

ADC positive reference voltage

0.985

VDDA

Oscillator pins

Vi(rtcx)

RTC oscillator input voltage

on pin XTAL32K_P

1.8

3.6

Vo(rtcx)

RTC oscillator output voltage

on pin XTAL32K_N

1.8

3.6

Vi(xtal)

System oscillator input voltage

on pin XTAL32M_P

1.1

1.2

Vo(rtcx)

System oscillator output

voltage

on pin XTAL32M_N

1.1

1.2

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