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LPC55S6X датащи(PDF) 69 Page - NXP Semiconductors

номер детали LPC55S6X
подробное описание детали  32-bit Arm Cortex짰-M33; M33 coprocessor, TrustZone, PowerQuad, CASPER, 320 KB SRAM; 640 KB flash, USB HS,Flexcomm Interface, SDIO, 32-bit counter/ timers,SCTimer/PWM, PLU, 16-bit 1.0 Msamples/sec ADC,Comparator, Temperature Sensor, AES, PUF, SHA, CRC, RNG
PDF  128 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo NXP - NXP Semiconductors

LPC55S6X датащи(HTML) 69 Page - NXP Semiconductors

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LPC55S6x
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2020. All rights reserved.
Product data sheet
Rev. 1.9 — 10 February 2020
69 of 128
NXP Semiconductors
LPC55S6x
32-bit ARM Cortex-M33 microcontroller
8. Limiting values
[1]
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to VSS unless
otherwise noted.
c) The limiting values are stress ratings only and operating the part at these values is not recommended and proper operation is not
guaranteed. The conditions for functional operation are specified in Table 22.
[2]
Maximum/minimum voltage above the maximum operating voltage (see Table 22) and below ground that can be applied for a short time
(< 10 ms) to a device without leading to irrecoverable failure. Failure includes the loss of reliability and shorter lifetime of the device.
Table 11.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Symbol
Parameter
Conditions
Min
Max
Unit
VDD
Main IO supply
[2] -0.3
3.96
V
VBAT_DCDC
Supply of DCDC output
stage. DCDC core
supply (references and
regulation stages)
[2] -0.3
3.96
V
VBAT_PMU
Analog supply
[2] -0.3
3.96
V
VDD_PMU
Analog supply for Core.
DCDC output
[2] -0.3
1.26
V
USB0_3V3
USB0 analog 3.3 V
supply.
[2] -0.3
3.96
V
USB1_3V3
USB1 analog 3.3 V
supply.
[2] -0.3
3.96
V
VDDA
Analog supply voltage
for ADC
[2] -0.3
3.96
V
Vrefp
ADC positive reference
voltage
[2] -0.3
3.96
V
VI
input voltage
only valid when the VDD ≥ 1.8 V
[5]
0.5
VDD + 0.5
V
VI
input voltage
on I2C open-drain pins
0.5
VDD + 0.5
V
USB_DM,
USB_DP pins
0.3
USB_3V3 + 0.5 V
VIA
analog input voltage
on digital pins configured for an analog
function
[6][7] -0.3
3.96
V
IDD
total supply current
per supply pin (HLQFP100, VFBGA98)
-
256
mA
ISS
total ground current
per ground pin (HLQFP100, VFBGA98)
-
256
mA
Ilatch
I/O latch-up current
(0.5VDD) < VI < (1.5VDD);
Tj < 125 C
-
100
mA
Tstg
storage temperature
-65
+150
C
VESD
electrostatic discharge
voltage
human body model; all pins
[3]
2000
V
VESD
electrostatic discharge
voltage
charge device model; all pins
[3]
500
V



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