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LPC55S6X датащи(PDF) 83 Page - NXP Semiconductors |
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LPC55S6X датащи(HTML) 83 Page - NXP Semiconductors |
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83 / 128 page ![]() LPC55S6x All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.9 — 10 February 2020 83 of 128 NXP Semiconductors LPC55S6x 32-bit ARM Cortex-M33 microcontroller 11.3 Wake-up process [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. [2] The wake-up time measured is the time between when a GPIO input pin is triggered to wake the device up from the low power modes and from when a GPIO output pin is set in the interrupt service routine (ISR) wake-up handler. [3] FRO enabled, all peripherals off. [4] RTC disabled. Wake-up from deep power-down causes the part to go through entire reset process. The wake-up time measured is the time between when the RESET pin is triggered to wake the device up and when a GPIO output pin is set in the reset handler. Wake-up time for non-secure mode. [5] Compiler settings: IAR v8.40, High optimization [6] Applies to device revision 1B. [7] Applies to device revision 0A. 11.4 FRO (12 MHz/96 MHz) [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. 11.5 FRO (1 MHz) [1] Typical ratings are not guaranteed. The values listed are at room temperature (25 C), nominal supply voltages. Table 25. Dynamic characteristic: Typical wake-up times from low power modes VBAT_PMU = VBAT_DCDC = VDD = 3.3 V;Tamb =25 C; using FRO as the system clock. Symbol Parameter Conditions Min Typ[1][5] Max Unit twake wake-up time from Sleep mode, 12 MHz, No PRIMASK backup and restore [2][3] 4.0 s from Sleep mode, 96 MHz, No PRIMASK backup and restore [2][3] 500 ns from Deep-sleep mode with full SRAM retention: [2] 64 s from Power-down mode with CPU retention and 4 KB retained [2] 346 s from deep power-down mode; 4KB retained, RTC disabled; using RESET pin. [4][6] 4.6 ms from deep power-down mode; 4KB retained, RTC disabled; using RESET pin. [4][7] 17 ms Table 26. Dynamic characteristic: FRO Tamb = 40 C to +105 C; 1.8 V VBAT_DCDC 3.6 V. Symbol Parameter Conditions Min Typ[1] Max Unit fosc(RC) FRO clock frequency - 11.76 12 12.24 MHz fosc(RC) FRO clock frequency - 94.08 96 97.92 MHz Table 27. Dynamic characteristic: FRO Tamb = 40 C to +105 C; 1.8 V VBAT_DCDC 3.6 V. Symbol Parameter Conditions Min Typ[1] Max Unit fosc(RC) FRO clock frequency - 0.85 1 1.15 MHz |
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