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M16C/26 датащи(PDF) 202 Page - Renesas Technology Corp |
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M16C/26 датащи(HTML) 202 Page - Renesas Technology Corp |
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202 / 239 page ![]() Renesas Technology Corp. CPU Rewrite Mode (Flash Memory Version) 196 M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Software Commands Table 1.20.1 lists the software commands available with the M16C/26 (flash memory version). After setting the CPU rewrite mode select bit to 1, write a software command to specify an erase or program operation. Note that when entering a software command, the upper byte (D8 to D15) is ignored. The content of each software command is explained below. The first bus cycle commands must be written to an even address in the user ROM area. Read Array Command (FF16) The read array mode is entered by writing the command code “FF16” in the first bus cycle. When an even address to be read is input in one of the bus cycles that follow, the content of the specified address is read out at the data bus (D0–D15), 16 bits at a time. The read array mode is retained intact until another command is written. However, please begin to read data in the following procedures when a user uses read array com- mand after program command. (1) Set FF16, FF16, FF16, FF16 to arbitrary continuing four address beforehand (2) Input the top address which FF16 was set at (in read array mode) (3) Input the top address till FFFF16 agrees with the value that begins to have been read (4) Input top address +2 (5) Input top address +2 till FFFF16 agrees with the value that begins to have been read (6) Input an arbitrary address Read Status Register Command (7016) When the command code “7016” is written in the first bus cycle, the content of the status register is read out at the data bus (D0–D7) by a read in the second bus cycle (Set an address to even address in the user ROM area). The status register is explained in the next section. In EW1 mode, cannot use read status register command. Clear Status Register Command (5016) This command is used to clear the bits SR4 and SR5 of the status register after they have been set. These bits indicate that operation has ended in an error. To use this command, write the command code “5016” in the first bus cycle. Table 1.20.1. List of software commands (CPU rewrite mode) Command Program Clear status register Read array Read status register (Note 3) First bus cycle S econd bus cycle Block erase Write Write Write Write Write Mode Read Write Write Mode X WA (Note 3) BA (Note 4) Address SRD (Note 2) WD (Note 3) D016 Data (D0 to D7) FF16 7016 5016 4016 2016 Data (D0 to D7) X X X WA X Address Note 1: When a software command is input, the high-order byte of data (D8 to D15) is ignored. Note 2: SRD = Status Register Data (Set an address to even address in the user ROM area) Note 3: WA = Write Address (even address), WD = Write Data (16-bit data) Note 4: BA = Block Address (Enter the maximum address of each block that is an even address.) Note 5: X denotes a given address in the user ROM area (that is an even address). |
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