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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M16C/26 датащи(PDF) 64 Page - Renesas Technology Corp |
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M16C/26 датащи(HTML) 64 Page - Renesas Technology Corp |
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64 / 239 page  Renesas Technology Corp. Interrupts 58 M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Figure 1.9.9. Maskable interrupts priorities (peripheral I/O interrupts) Timer B2 Timer B0 Timer A3 Timer A1 Timer B1 Timer A4 UART1 receive UART0 receive UART2 receive/ACK2 A-D conversion DMA1 UART 2 bus collision detection Timer A0 UART1 transmit UART0 transmit UART2 transmit/NACK2 Key input interrupt DMA0 Processor interrupt priority level (IPL) Interrupt enable flag (I flag) INT1 INT0 Watchdog timer Reset DBC NMI Interrupt request accepted Level 0 (initial value) Priority level of each interrupt High Low Priority of peripheral I/O interrupts (if priority levels are same) INT3 Timer A2 INT5 INT4 Address match Interrupt request level judgment output to clock generating circuit (Fig.1.8.3) |
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