M16CSLASH26 datasheet(199/239 Pages) RENESAS

199 / 239 page

CPU Rewrite Mode (Flash Memory Version)

193

Renesas Technology Corp.

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

End

Start

Execute read array command or reset flash

memory by setting flash memory reset bit (by

writing 1 and then 0 in succession) (Note 4)

Single-chip mode, memory expansion

mode, or boot mode (Note 1)

Set processor mode register (Note 2)

Using software command execute erase,

program, or other operation

(Set lock bit disable bit as required)

Jump to transferred control program in RAM

(Subsequent operations are executed by control

program in this RAM)

Transfer CPU rewrite mode control

program to internal RAM

(Boot mode only)

Write 0 to user ROM area select bit (Note 5)

Write 0 to CPU rewrite mode select bit

(Boot mode only)

Set user ROM area select bit to 1

Set CPU rewrite mode select bit to 1 (by

writing 0 and then 1 in succession)(Note 3)

Program in ROM

Program in RAM

Note 1: In EW0 mode, must not be set to boot mode.

Note 2: During CPU rewrite mode, set the BCLK as shown below using the main clock divide ratio select bit (bit 6

at address 000616 and bits 6 and 7 at address 000716):

6.25 MHz or less when wait bit (bit 7 at address 000516) = 0 (without internal access wait state)

10.0 MHz or less when wait bit (bit 7 at address 000516) = 1 (with internal access wait state)

Note 3: For CPU rewrite mode select bit to be set to 1 , the user needs to write a 0 and then a 1 to it in

succession. When it is not this procedure, it is not enacted in 1 . This is necessary to ensure that no

interrupt or DMA transfer will be executed during the interval. Write to this bit only when executing out of

an area other than the internal flash memory. Also only when NMI pin is H level.

Note 4: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to

execute a read array command or reset the flash memory.

Note 5: 1 can be set. However, when this bit is 1 , user ROM area is accessed.

EW0 mode operation procedure

Figure 1.20.2a. EW0 mode set/reset flowchart

Figure 1.20.2b. EW1 mode set/reset flowchart

End

Start

Single-chip mode or memory expansion mode

(Note 1)

Set processor mode register (Note 2)

Using software command execute erase,

program, or other operation

(Set lock bit disable bit as required)

Set EW1 mode select bit to 1 after

having set EW0 mode select bit to 1

(by writing 0 and then 1 in succession)(Note 3)

Write 0 to EW0 mode select bit

Program in ROM

Note 1: In EW0 mode, must not be set to boot mode.

Note 2: During CPU rewrite mode, set the BCLK as shown below using the main clock divide ratio select bit (bit 6

at address 000616 and bits 6 and 7 at address 000716):

6.25 MHz or less when wait bit (bit 7 at address 000516) = 0 (without internal access wait state)

10.0 MHz or less when wait bit (bit 7 at address 000516) = 1 (with internal access wait state)

Note 3: For CPU rewrite mode select bit to be set to 1 , the user needs to write a 0 and then a 1 to it in

succession. When it is not this procedure, it is not enacted in 1 . This is necessary to ensure that no

interrupt or DMA transfer will be executed during the interval. Write to this bit only when executing out of

an area other than the internal flash memory. Also only when NMI pin is H level.

Note 4: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to

execute a read array command or reset the flash memory.

Note 5: 1 can be set. However, when this bit is 1 , user ROM area is accessed.

EW1 mode operation procedure

M16C/26 датащи(PDF) 199 Page - Renesas Technology Corp

M16C/26 датащи(HTML) 199 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL