M16CSLASH26 datasheet(42/239 Pages) RENESAS

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Oscillation Stop Detection

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Oscillation stop detection bit (CM20)

You can start the oscillation stop detection by setting this bit to “1”. The detection is not executed when

this bit is set to “0” or in reset status. Be sure to set this bit to “0” before setting for the stop-mode. Set this

bit again to “1” after release from stop-mode. This is because it is necessary to cancel the oscillation stop

detection function due to a certain period of unstable oscillation after release from stop-mode. Set this bit

to “0” also before setting the main clock stop bit (bit 5 at 000616) to “1”.

Do not set this bit to “1” if the frequency of XIN is lower than 2 MHz.

Main clock switch bit (CM21)

You can use the ring oscillator as a system clock by setting this bit to “1”. When this bit is "0", the ring

oscillator is not in operation. For more explanation, see the section of the clock generating circuit.

Oscillation stop detection status (CM22)

You can see the status of the oscillation stop detection. When this bit is “1”, an oscillation stop is de-

tected. For usage of this bit, see the explanation on CM27.

Clock monitor bit (CM23)

You can see the operation status of the XIN clock. When this bit is “0”, XIN is operating correctly. You can

check the operation status of XIN when an oscillation stop detection interrupt is generated.

Operation select (when an oscillation stop is detected) bit (CM27)

(1) Operation when internal reset is selected (CM27 is set to “0”.)

An internal reset is generated when an abnormal stop of XIN is detected. The microcomputer stops in

reset status and does not operate further.

Note: Release from this status is only possible through an external reset. However, in case of a

defect XIN clock, further operation cannot be compensated.

All ports are configured to input port (floating) after an internal reset is generated.

(2) Operation when oscillation stop detection interrupt is selected (CM27 is set to “1”.)

An oscillation stop detection interrupt is generated when an abnormal stop of XIN is detected. The ring

oscillator starts operation instead of the XIN clock which stopped abnormally. The operation goes further

with the supply from the ring oscillator. For the oscillation stop detection interrupt judgement on the

interrupt condition is necessary, because this interrupt shares the vector table with watchdog timer inter-

rupt. Use the oscillation stop detection status (CM22) for the judgment. By clearing CM22, the accep-

tance of oscillation stop detection interrupt resumes. Figure 1.8.7 shows the flow of the judgment.

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