M16CSLASH26 datasheet(25/239 Pages) RENESAS

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Renesas Technology Corp.

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

2. Limitations on wait instructions with peripheral clocks turned off

If the WAIT instruction is executed when bit VC13 of the VCR1 register is equal to “1” (VCC

VDET4), bit VC27 of the VCR2 register is equal to “1” (VDET4 detection circuit enabled), and bit D40

of the D4INT register is equal to “1” (VDET4 detection interrupt enabled), a VDET4 detection interrupt

is immediately generated, causing the microcomputer to exit from wait mode.

In systems where the microcomputer enters wait mode when the input voltage in the VCC pin drops

under VDET4 and exits from wait mode when the input voltage goes over VDET4, ensure that the

WAIT instruction is executed when VC13 = “0” (VCC < VDET4).

VDET4 detect interrupt generation circuit

Oscillation stop

detection

interrupt signal

Watchdog timer block

This bit is cleared to 0 (not detected) by writing a 0 in a program.

D43

D41

CM02

WAIT instruction(wait mode)

D40

VC27

VCC

VREF

(Rejection wide:200 ns)

VC13

H when VC27

bit= 0 (disabled)

Noise rejection

circuit

Digital

filter

BCLK

D42

DF1, DF0

1/2

002

012

102

112

1/2

1/8

Noise

rejection

VDET4 detect

signal

Watchdog timer

overflow signal

D42 bit is cleared to 0 (not

detected) by writing a 0 in a

program. VC27 bit is cleared to

0 (VDET4 detection circuit

disabled), the D42 bit is set to

VDET4 detect circuit

VDET4 detect

interrupt signal

watchdog

timer interrupt

signal

Non-maskable

interrupt signal

Output of the digital filter (Note 2)

D42 bit

Note 1 : D40 is 1 (VDET4 detect interrupt enabled)

Note 2 : Output of the digital filter shown in Figure 1.5.8.

VDET4 detect interrupt signal

(Note 1)

No VDET4 detection interrupt signals are generated

when the D42 bit is H .

sampling

Set to 0 in a

program (not

detected)

VC13 bit

VCC

sampling

Set to 0 in a

program (not

detected)

Figure 1.5.8. VDET4 detection interrupt generation block

Figure 1.5.9. VDET4 detection interrupt generation circuit operation example

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