M16CSLASH26 datasheet(38/239 Pages) RENESAS

38 / 239 page

Renesas Technology Corp.

Clock Generating Circuit

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Figure 1.8.4a. Clock control registers 0 and 1

System clock control register 0 (Note 1)

Symbol

Address

When reset

CM0

000616

4816

Bit name

Function

Bit symbol

CM07

CM05

CM04

CM03

CM02

CM06

WAIT peripheral function

clock stop bit

0 : Do not stop peripheral function clock in wait mode

1 : Stop peripheral function clock in wait mode (Note 8)

XCIN-XCOUT drive capacity

select bit (Note 2)

0 : LOW

1 : HIGH

Port XC select bit

0 : I/O port

1 : XCIN-XCOUT generation (Note 9)

Main clock (XIN-XOUT)

stop bit (Note 3, 4, 5)

0 : On

1 : Off

Main clock division select

bit 0 (Note 7)

0 : CM16 and CM17 valid

1 : Division by 8 mode

System clock select bit

(Note 6)

0 : XIN, XOUT

1 : XCIN, XCOUT

Note 1: Set bit 0 of the protect register (address 000A16) to 1 before writing to this register.

Note 2: Changes to 1 when shifting to stop mode and at a reset.

Note 3: When entering low power dissipation mode, main clock stops by using this bit. To stop the main clock, when the sub clock

oscillation is stable, set system clock select bit (CM07) to 1 before setting this bit to 1 . The main clock division select

bit 0 (CM06) and the XIN-XOUT drive capacity select bit (CM15) change to 1 when this bit is set to 1 .

Note 4: When inputting external clock, only clock oscillation buffer is stopped and clock input is acceptable.

Note 5: If this bit is set to 1 , XOUT turns H . The built-in feedback resistor remains being connected, so XIN turns pulled up to XOUT

( H ) via the feedback resistor.

Note 6: Set port XC select bit (CM04) to 1 and stabilize the sub-clock oscillating before setting this bit from 0 to 1 .

Do not write to both bits at the same time. And also, set the main clock stop bit (CM05) to 0 and stabilize the main clock

oscillating before setting this bit from 1 to 0 .

Note 7: This bit changes to 1 when shifting from high-speed/medium-speed mode to stop mode, shifting to low power dissipation

mode and at a reset. When shifting from high-speed/medium-speed mode to low-speed mode, the value before high-speed/

medium-speed mode is retained.

Note 8: fC32 is not included. Do not set to 1 when using low-speed or low power dissipation mode.

Note 9: When the XCIN/XCOUT is used, set ports P86 and P87 as the input ports without pull-up.

Note 10: When setting this bit to "0", XCIN-XCOUT drive capacity select bit becomes "1".

System clock control register 1 (Note 1)

Symbol

Address

When reset

CM1

000716

2016

Bit name

Function

Bit symbol

CM10

All clock stop control bit

(Note4)

0 : Clock on

1 : All clocks off (stop mode)

Note 1: Set bit 0 of the protect register (address 000A16) to 1 before writing to this register.

Note 2: This bit changes to 1 when shifting from high-speed/medium-speed mode to stop mode, shifting to low power dissipation

mode and at a reset. When shifting from high-speed/medium-speed mode to low-speed mode, the value before high-speed/

medium-speed mode is retained.

Note 3: Can be selected when bit 6 of the system clock control register 0 (address 000616) is 0 . If 1 , division mode is fixed at 8.

Note 4: If this bit is set to 1 , XOUT turns H , and the built-in feedback resistor is cut off. XCIN and XCOUT turn high-impedance state.

CM15

XIN-XOUT drive capacity

select bit (Note 2)

0 : LOW

1 : HIGH

CM16

CM17

Main clock division

select bit 1 (Note 3)

0 0 : No division mode

0 1 : Division by 2 mode

1 0 : Division by 4 mode

1 1 : Division by 16 mode

b7 b6

0 0

(Note 10)

Reserved bit

Must always be set to 0

Reserved bit

Must always be set to 0

Reserved bit

Must always be set to 0

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