M16CSLASH26 datasheet(100/239 Pages) RENESAS

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Renesas Technology Corp.

Three-Phase Motor Control Timer Function

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Three-Phase Motor Control Timer Function

Use of more than one built-in timer A and timer B provides the means of outputting three-phase motor

driving waveforms. This function requires that P85 become SD, making it important that P85 not be used for

general purpose I/O (GPIO). If the SD feature is not needed, then P85/SD must always be driven high.

Figure 1.14.1. Registers related to timers for three-phase motor control (1)

Three-phase PWM control register 0 (Note 4)

Symbol

Address

When reset

INVC0

034816

0016

b7 b6 b5 b4 b3 b2 b1 b0

Effective interrupt output

polarity select bit

INV00

Bit symbol

Bit name

Description

INV01

Effective interrupt output

specification bit

INV02

Mode select bit

INV04

Positive and negative

phases concurrent L output

disable function enable bit

INV07

Software trigger bit

INV06

Modulation mode select

bit

INV05

Positive and negative

phases concurrent L output

detect flag

INV03

Output control bit (Note 9)

0: A timer B2 interrupt occurs when the

timer A1 reload control signal is 1 .

1: A timer B2 interrupt occurs when the

timer A1 reload control signal is 0 .

0: Not specified.

1: Selected by the INV00 bit.

0: Normal mode

1: Three-phase PWM output mode

0: Output disabled

(Note 10)

1: Output enabled

0: Feature disabled

1: Feature enabled

0: Not detected yet

1: Already detected

0: Triangular wave modulation mode

1: Sawtooth wave modulation mode

0: Ignored

1: Trigger generated

(Note 6)

(Note 7)

(Note 3)

(Note 8)

(Note 5)

(Note 2)

Note 1: Set bit 1 of the protect register (address 000A16) to 1 before writing to this register.

Note 2: Set bit 1 of this register to 1 after setting timer B2 interrupt occurrences frequency set counter.

Note 3: Effective only in three-phase mode 1(Three-phase PWM control register's bit 1 = 1 ).

Note 4: Selecting three-phase PWM output mode causes the dead time timer, the U, V, W phase output control circuits,

and the timer B2 interrupt frequency set circuit works.

Note 5: No value other than 0 can be written.

Note 6: The dead time timer starts in synchronization with the falling edge of timer Ai output. The data transfer from the

three-phase buffer register to the three-phase output shift register is made only once in synchronization with the

transfer trigger signal after writing to the three-phase output buffer register.

Note 7: The dead time timer starts in synchronization with the falling edge of timer A output and with the transfer trigger

signal. The data transfer from the three-phase output buffer register to the three-phase output shift register is

made with respect to every transfer trigger.

Note 8: The value, when read, is 0 .

(Note 4)

Note 9: The INV03 bit is set to 0 in the following cases:

• When reset.

• When positive and negative go active simultaneously while INV04 bit is 1 .

• When set to 0 in a program.

• When input on the SD pin changes state from H to L . (The INV03 bit cannot be set to 1 when SD input is L .)

Note 10: When INV03 = 1 (three-phase motor control timer output enabled) P80, P81, P72, P73, P74, and P75 function

as U, U, V, V, W, and W.

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