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M16C/26 датащи(PDF) 39 Page - Renesas Technology Corp |
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M16C/26 датащи(HTML) 39 Page - Renesas Technology Corp |
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39 / 239 page ![]() Clock Generating Circuit 33 Renesas Technology Corp. M16C/26 Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Under development Preliminary Specifications Rev. 0.9 Specifications in this manual are tentative and subject to change. Figure 1.8.4b. Peripheral clock select register Figure 1.8.4c. Processor mode register 2 W Function Bit symbol Bit name Processor mode register 2 (Note 1) Symbol Address When reset PM2 001E16 XXX000002 R b7 b6 b5 b4 b3 b2 b1 b0 PM20 Specifying wait when accessing SFR registers (Note 2) 0 : 2 waits 1 : 1 wait 00 0 0 Must always be set to "0" Reserved bit Nothing is assigned. Writes must set each bit to "0". Read values are indeterminate. 0 PM24 P85/NMI configuration bit (Notes 3,6,7) 0: P85 function (NMI disable) 1: NMI function Note 1: Set bit 1 of the protect register (address 000A16) to "1" before writing new values to this register. Note 2: When the system clock is 16Mhz and more, must set to 2 waits. Note 3: This bit cannot be changed from "1" to "0" in software. Note 4: Setting PM21 to "1" results in the following: • BCLK is not halted by WAIT instruction. • Writing to the following bits has no effect: CM02, of register CM0 CM05, of register CM0 (main clock is not halted) CM07, of register CM0 (CPU clock source does not change) CM10, of register CM1 (stop mode is not entered) CM20, of register CM2 (oscillation stop, re-oscillation detection function settings do not change) Note 5: Setting PM22 to "1" results in the following: • The ring oscillator starts oscillating, and the ring oscillator clock becomes the watchdog timer count source. • Writing to CM10 disabled (stop mode is not entered). • Watchdog timer does not stop when in wait mode or hold state. Note 6: For NMI function, this bit must be set to "1" in first instruction after reset. Note 7: When this bit is set to "1", the P85 direction register must be "0". System clock protective bit (Notes 3,4) 0 : Clock is protected by PRCR register 1 : Clock modification disabled PM21 WDT count source protective bit (Notes 3,5) 0 : CPU clock is used for the watchdog timer count source 1 : Ring oscillator clock is used for the watchdog timer count source PM22 W Function Bit symbol Bit name Peripheral clock select register (Note) Symbol Address When reset PCLKR 025E16 0316 R b7 b6 b5 b4 b3 b2 b1 b0 PCLK0 Timers A, B clock select bit (Clock source for the timers A, B, and the dead time timer) 0 : f2 1 : f1 00 0 Reserved bit Must always be set to 0 Note: Set the bit 0 of the protect register (address 000A16) to "1" before rewriting this register. 00 0 PCLK1 SI/O clock select bit (Clock source for UART0 to UART2) 0 : f2SIO 1 : f1SIO |
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