M16CSLASH26 datasheet(44/239 Pages) RENESAS

44 / 239 page

Renesas Technology Corp.

Oscillation Stop Detection

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Stop Mode

Writing “1” to the all-clock stop control bit (bit 0 at address 000716) stops all oscillation and the microcom-

puter enters stop mode. In stop mode, the content of the internal RAM is retained provided that VCC

remains above 2V.

Because the oscillation , BCLK, f1 to f32, f1SIO2 to f32SIO2, fC, fC32, and fAD stops in stop mode, peripheral

functions such as the A-D converter and watchdog timer do not function. However, timer A and timer B

operate provided that the event counter mode is set to an external pulse, and UARTi(i = 0 to 2) functions

provided an external clock is selected. Port pins retain their status from before stop mode is entered.

Stop mode is cancelled by a hardware reset or an interrupt. If an interrupt is to be used to cancel stop

mode, that interrupt must first have been enabled, and the priority level of the interrupts which are not used

to cancel must have been changed to 0. If returning by an interrupt, that interrupt routine is executed. If only

a hardware reset or an NMI interrupt is used to cancel stop mode, change the priority level of all interrupts

to 0, then shift to stop mode.

The main clock division select bit 0 (bit 6 at address 000616) changes to “1” when shifting from high-speed/

medium-speed mode to stop mode, shifting to low power dissipation mode and at reset. When shifting from

high-speed/medium-speed mode to low-speed mode, the value before high-speed/medium-speed mode is

retained.

Wait Mode

When a WAIT instruction is executed, the BCLK stops and the microcomputer enters the wait mode. In this

mode, oscillation continues but the BCLK and watchdog timer stop. Writing “1” to the WAIT peripheral

function clock stop bit and executing a WAIT instruction stops the clock being supplied to the internal

peripheral functions, allowing power dissipation to be reduced. However, peripheral function clock fC32

does not stop so that the peripherals using fC32 do not contribute to the power saving. When the microcom-

puter is running in low-speed or low power dissipation mode, do not enter WAIT mode with this bit set to “1”.

Port pins retain their status from before wait mode is entered.

Wait mode is cancelled by a hardware reset or an interrupt. If an interrupt is used to cancel wait mode, that

interrupt must first have been enabled, and the priority level of the interrupts which are not used to cancel

must have been changed to 0. If returning by an interrupt, the clock in which the WAIT instruction executed

is set to BCLK by the microcomputer, and the action is resumed from the interrupt routine. If only a hard-

ware reset or an NMI interrupt is used to cancel wait mode, change the priority level of all interrupts to 0,

then shift to wait mode.

M16C/26 датащи(PDF) 44 Page - Renesas Technology Corp