
HT80C51 User Manual
Peripheral Modules – I2C Interface (SIO1)
Handshake Solutions
© Philips Electronics N.V. 2005
Page 51 of 132
Arbitration and Synchronization Logic
In the Master Transmitter mode, the arbitration logic checks that every transmitted logic 1 actually
appears as a logic 1 on the I2C bus. If another device on the bus overrules a logic 1 and pulls the SDA
line low, arbitration is lost, and SIO1 immediately changes from master transmitter to slave receiver.
SIO1 will continue to output clock pulses (on SCL) until transmission of the current serial byte is com-
plete.
Arbitration may also be lost in the Master Receiver mode. Loss of arbitration in this mode can only
occur while SIO1 is returning a “not acknowledge: (logic 1) to the bus. Arbitration is lost when another
device on the bus pulls this signal LOW. Since this can occur only at the end of a serial byte, SIO1
generates no further clock pulses. The arbitration procedure is illustrated in [Figure 17].
The synchronization logic will synchronize the serial clock generator with the clock pulses on the SCL
line from another device. If two or more master devices generate clock pulses, the “mark” duration is
determined by the device that generates the shortest “marks,” and the “space” duration is determined
by the device that generates the longest “spaces.” [Figure 18] shows the synchronization procedure.
A slave may stretch the space duration to slow down the bus master. The space duration may also be
stretched for handshaking purposes. This can be done after each bit or after a complete byte transfer.
SIO1 will stretch the SCL space duration after a byte has been transmitted or received and the ac-
knowledge bit has been transferred. The serial interrupt flag (SI) is set, and the stretching continues
until the serial interrupt flag is cleared.
123
4
8
9
ACK
SCL
SDA
(3)
(2)
(1)
(1)
(1) Another device transmits identical serial data.
(2) Another device overrules a logic1 (dotted line) transmitted by SIO1 (master) by pulling the SDA line low. Arbitration is
lost, and SIO1 enters the slave receiver mode.
(3) SIO1 is in the slave receiver mode but still generates clock pulses until the current byte has been transmitted
. SIO1 will
not generate clock pulses for the next byte. Data on SDA originates from the new master once it has won arbitration.
[Figure 17] Arbitration Procedure