HT80C51 User Manual
Peripheral Modules – Timers 0 and 1
Handshake Solutions
© Philips Electronics N.V. 2005
Page 27 of 132
TCON
Timer/Counter Control
addr = 88H
reset value = 00H
bits
7
6
5
4
3
2
1
0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
bit
symbol
Function
TCON.7
TF1
Timer 1 overflow flag.
Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or
clearing the bit in software.
TCON.6
TR1
1:
0:
Timer 1 Run control bit. Set/cleared by software to turn Timer 1 on/off.
Timer 1 on.
Timer 1 off.
TCON.5
TF0
Timer 0 overflow flag.
Set by hardware on Timer/Counter overflow.
Cleared by hardware when processor vectors to interrupt routine, or
clearing the bit in software.
TCON.4
TR0
1:
0:
Timer 0 Run control bit. Set/cleared by software to turn Timer 1 on/off.
Timer 0 on.
Timer 0 off.
TCON.3
IE1
Interrupt 1 edge flag. Set by hardware when external interrupt is de-
tected. Cleared when interrupt is processed.
TCON.2
IT1
1:
0:
Interrupt 1 type control bit.
External interrupt t01_int1_n_i is edge sensitive (falling edge).
External interrupt t01_int1_n_i is level sensitive (low level).
TCON.1
IE0
Interrupt 0 edge flag. Set by hardware when external interrupt is de-
tected. Cleared when interrupt is processed.
TCON.0
IT0
1:
0:
Interrupt 0 type control bit.
External interrupt t01_int0_n_i is edge sensitive (falling edge).
External interrupt t01_int0_n_i is level sensitive (low level).
TL0
Timer 0 Counter Register, Low Byte
addr = 82H
reset value = 00H
bits
7
6
5
4
3
2
1
0
TL0
TH0
Timer 0 Counter Register, High Byte
addr = 84H
reset value = 00H
bits
7
6
5
4
3
2
1
0
TH0
TL1
Timer 1 Counter Register, Low Byte
addr = 83H
reset value = 00H
bits
7
6
5
4
3
2
1
0
TL1
TH1
Timer 1 Counter Register, High Byte
addr = 85H
reset value = 00H
bits
7
6
5
4
3
2
1
0
TH1
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