HT80C51 datasheet(13/132 Pages) ETC2

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HT80C51 User Manual

Memory Organization – Special Function Registers

Handshake Solutions

Page 13 of 132

2.5.

Special Function Registers

The upper address range of the direct addressable data memory is occupied by the special function

registers (SFRs). These registers not only serve as data storage, they also have special function for

the CPU or peripherals they are attached to. A map of this area is shown in [Figure 6].

SPCR

SPSR

SPDR

ACC

S1CON S1STA S1DAT S1ADR

PSW

XRAMP

SCON

SBUF

TCON

TMOD

TL0

TL1

TH0

TH1

DPL

DPH

PCON

↑ SFRs in this column are bit addressable

[Figure 6]

SFR memory map

Note that in the SFR-map not all of the addresses are occupied. Unoccupied addresses are not im-

plemented on the chip. Read accesses to these unimplemented SFR locations will in general return

random data, and write accesses will have no effect. User software should not write 1s to these unim-

plemented locations, since they may be used in other 80C51 Family derivative products to invoke new

features.

There are two types of special functions registers: registers, which are part of the CPU and often di-

rectly used by certain instructions, and SFRs, which are implemented in peripheral blocks. The SFRs

of the CPU are available in all derivatives of this microcontroller and are described in the text below.

Peripheral blocks are optional and so are the SFRs, which are implemented inside these peripherals.

Therefore the peripheral SFRs are described with the peripheral blocks in Chapter 5.

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