HT80C51 datasheet(37/132 Pages) ETC2

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HT80C51 User Manual

Peripheral Modules – Standard Serial Interface (SIO0)

Handshake Solutions

Page 37 of 132

SBUF read only

SBUF write only

HT-SFR bus

sio_rxd_i

sio_txd_o

>=1

sio_clk_o

int[4]

sio_clk_i

sio_active_o

sio_mode0_o

SEND

RECEIVE

notRI

REN

RECEIVE

[Figure 12] Block Diagram of Serial Interface in Mode 0

5.3.4.5.

More About Mode 1

10 bits are transmitted (through sio_txd_o) or received (through sio_rxd_i): a start bit (0), 8 data

bits (LSB first), and a stop bit (1). On receive, the stop bit goes into RB8 in Special Function Register

SCON. The baud rate is derived from the overflow rate of timer 1. [Figure 13]shows a simplified func-

tional diagram of the serial port in mode 1.

Transmission is initiated by any instruction that uses SBUF as a destination register. Transmission

actually commences immediately after the next rollover in the divide-by-16 counter. (Thus, the bit

times are synchronized to the divide-by-16 counter, not to the “write to SBUF” signal.) After sending the

start-bit and 8 data bits, the TI bit is set and the stop-bit is sent.

Reception is initiated by the detection of a 1-to-0 transition at sio_rxd_i. For this purpose

sio_rxd_i is sampled at a rate of 16 times whatever baud rate has been established. When a transi-

tion is detected, the divide-by-16 counter is immediately reset, thus it aligns its rollovers with the

boundaries of the incoming bit times. At the 7th, 8th, and 9th counter states of each bit time, the bit

detector samples the value of sio_rxd_i. The value accepted is the value that was seen in at least 2

of the 3 samples. This is done for noise rejection. If the value accepted during the first bit time is not 0,

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