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HC705MC4GRS/D датащи(PDF) 127 Page - NXP Semiconductors

номер детали HC705MC4GRS/D
подробное описание детали  General Release Specification
PDF  180 Pages
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производитель  NXP [NXP Semiconductors]
домашняя страница  http://www.nxp.com
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HC705MC4GRS/D датащи(HTML) 127 Page - NXP Semiconductors

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Serial Communications Interface
SCI Operation
General Release Specification
Serial Communications Interface
11.5.2.4 Receiver Noise Immunity
The data recovery logic samples each bit 16 times to identify and verify
the start bit and to detect noise. Any conflict between noise-detection
samples sets the noise flag (NF) in the SCSR. The NF bit is set at the
same time that the RDRF bit is set.
11.5.2.5 Framing Errors
If the data recovery logic does not detect a logic 1 where the stop bit
should be in an incoming character, it sets the framing error (FE) bit in
the SCSR. The FE bit is set at the same time that the RDRF bit is set.
11.5.2.6 Receiver Interrupts
All SCI interrupt sources share the same interrupt vector at address
$0FF2. The following sources can generate SCI receiver interrupt
requests:
•
Receive Data Register Full (RDRF) — The RDRF bit in the SCSR
indicates that the receive shift register has transferred a character
to the SCDR.
•
Receiver Overrun (OR) — The OR bit in the SCSR indicates that
the receive shift register shifted in a new character before the
previous character was read from the SCDR.
•
Idle Input (IDLE) — The IDLE bit in the SCSR indicates that 10 or
11 consecutive logic 1s shifted in from the PD5/RDI pin.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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