HC705MC4GRSSLASHD datasheet(63/180 Pages) NXP

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General Release Specification

Input/Output Ports

General Release Specification — MC68HC705MC4

Section 7. Input/Output Ports

7.1 Contents

7.2

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

7.3

Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64

7.4

MCU Line Interface Recommendations . . . . . . . . . . . . . . . . . .65

7.5

Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

7.6

Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67

7.7

Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

7.8

I/O Port Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

7.2 Introduction

In the user mode, 22 bidirectional input/output (I/O) lines are arranged

as two 8-bit I/O ports (port A and port C), one 4-bit I/O port (port B), and

one 2-bit port (port D). These ports are programmable as either inputs or

outputs, except port D bit 7 (input only), under software control of the

data direction registers (DDRs).

NOTE:

Enabling any module that is shared with a port could corrupt port data

written to the port before or during the time that module is enabled.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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