HC705MC4GRSSLASHD datasheet(59/180 Pages) NXP

номер детали	HC705MC4GRS/D

подробное описание детали	General Release Specification

PDF	180 Pages

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производитель	NXP [NXP Semiconductors]

домашняя страница	http://www.nxp.com

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Operating Modes

Bootloader Mode

General Release Specification

Operating Modes

6.4.2 EPROM Programming Register

This register is used to program the EPROM array. To program a byte

of EPROM, set LATCH, then write data to the desired address, and set

EPGM for t

EPGM.

LATCH — EPROM Latch Control

The LATCH bit is a read/write bit. When set, the address and data

buses are latched when a write to EPROM is done. EPROM cannot

be read if LATCH = 1.

1 = EPROM address and data bus configured for programming

0 = EPROM address and data bus configured for normal reads

EPGM — EPROM Program Control

The EPGM bit may be read or cleared at any time. It may only be set

if LATCH = 1. If LATCH = 0, the EPGM is cleared automatically.

LATCH and EPGM must be set sequentially. They cannot both be set

on the same write.

1 = Programming power switched on to the EPROM array

0 = Programming power switched off the EPROM array

Address:

$0026

Bit 7

654321

Bit 0

Read:

LATCH

EPGM

Write:

Reset:

Unaffected by Reset

= Unimplemented

Figure 6-4. EPROM Programming Register (EPGM)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705MC4GRS/D датащи(PDF) 59 Page - NXP Semiconductors