HC705MC4GRSSLASHD datasheet(23/180 Pages) NXP

23 / 180 page

General Description

Functional Pin Description

General Release Specification

General Description

1.5.1 V

and V

Power is supplied to the MCU through V

DD and VSS. VDD is connected to

a regulated +5-volt supply and V

SS is connected to ground. These pins

are located close to each other for low electromagnetic interference

(EMI) emissions and optimal decoupling.

Very fast signal transitions occur on the MCU pins. The short rise and

fall times place very high short-duration current demands on the power

supply. To prevent noise problems, take special care to provide good

power supply bypassing at the MCU. Use bypass capacitors with good

high-frequency characteristics, and position them as close to the MCU

as possible. Bypassing requirements vary, depending on how heavily

the MCU pins are loaded.

1.5.2 OSC1 and OSC2

These pins provide control input for an on-chip clock oscillator circuit. A

crystal, a ceramic resonator, or an external signal to these pins provides

the system clock. The oscillator frequency is two times the internal bus

rate.

The OSC1 and OSC2 pins can accept:

•

A crystal as shown in Figure 1-4(a)

•

A ceramic resonator as shown in Figure 1-4(a)

•

An external clock signal as shown in Figure 1-4(b)

The frequency, f

OSC, of the oscillator or external clock source is divided

by two to produce the internal bus clock operating frequency, f

OP. The

oscillator cannot be turned off by software if the stop disable option is

enabled via mask option.

1.5.2.1 Crystal

The circuit in Figure 1-4(a) shows a typical oscillator circuit for an

AT-cut, parallel resonant crystal. Follow the crystal manufacturer’s

recommendations, as the crystal parameters determine the external

component values required to provide maximum stability and reliable

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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