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HC705MC4GRS/D датащи(PDF) 76 Page - NXP Semiconductors |
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HC705MC4GRS/D датащи(HTML) 76 Page - NXP Semiconductors |
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76 / 180 page ![]() Analog Subsystem MC68HC705MC4 — Rev. 2.0 Analog Subsystem ADON — A/D On When the A/D is turned on (ADON = 1), it requires a time tADON for the current sources to stabilize, and results can be inaccurate during this time. This bit turns on the charge pump. If the ADRC is set, clearing this bit disables the RC oscillator to save power. CH3:CH0 — Channel Select Bits CH3, CH2, CH1, and CH0 form a 4-bit field, which is used to select one of eight A/D channels. Channels 0–5 correspond to port C input pins on the MCU. Channels 8-a are used for internal reference points. In user mode, channel b is reserved and converts to $00. Table 8-1 shows the signals selected by the channel select field. Using a port C pin as both an analog and digital input simultaneously is prohibited to prevent excess power dissipation. When the A/D is enabled (ADON = 1) and one of the channels 0-5 is selected, the corresponding port C pin will appear as a logic 0 to a digital read. The remaining port C pins (0-5) will read normally. To digitally read all eight port C pins simultaneously, the A/D must be disabled (ADON = 0). Table 8-1. A/D Channel Assignments Channel Signal 0 AD0 Port C Bit 0 1 AD1 Port C Bit 1 2 AD2 Port C Bit 2 3 AD3 Port C Bit 3 4 AD4 Port C Bit 4 5 AD5 Port C Bit 5 6 Unused 7 Unused 8VREFH 9VREFL a(VREFH + VREFL)/2 b–f VREFL Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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