HC705MC4GRSSLASHD datasheet(65/180 Pages) NXP

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Input/Output Ports

MCU Line Interface Recommendations

General Release Specification

Input/Output Ports

7.4 MCU Line Interface Recommendations

It is expected that some applications appropriate to the

MC68HC705MC4 will be required to determine the presence of line

(mains) voltage using the MCU. A low-cost MCU line interface is shown

in Figure 7-2. PA7 has been intentionally located between V

DD and VSS

to provide a lowest possible impedance path for the injected currents in

particular fast transients. Although any I/O port will function in this

manner, it is recommended that only PA7 be used for such an interface.

The positive and negative excursions of the input voltage relative to the

neutral return are clamped between V

SS and VDD using the internal

parasitic input diodes. The series resistor limits the injected currents to

the specified value. (Refer to Section 14. Electrical Specifications.)

The resistor value must be calculated based upon maximum expected

transient voltage levels (for example, not line peak values). Care should

be taken to ensure parasitic series resistor and PCB capacitance will not

couple transients to the MCU input. Additional filtering is also highly

recommended to help prevent EMC and electrical overstress (EOS)

problems.

Figure 7-2. Line Interface Circuitry

PA7

VSS

LINE

MCU

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC705MC4GRS/D датащи(PDF) 65 Page - NXP Semiconductors