M16CSLASH26 datasheet(208/239 Pages) RENESAS

208 / 239 page

Renesas Technology Corp.

Functions to Inhibit Rewriting Flash Memory Version

202

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Functions To Inhibit Rewriting Flash Memory Version

To prevent the contents of the flash memory version from being read out or rewritten easily, the device

incorporates a ROM code protect function for use in parallel I/O mode and an ID code check function for

use in standard serial I/O mode.

ROM code protect function

The ROM code protect function is used to prohibit reading out or modifying the contents of the flash

memory during parallel I/O mode and is set by using the ROM code protect control address register

(0FFFFF16). Figure 1.21.1 shows the ROM code protect control address (0FFFFF16). (This address

exists in the user ROM area.)

If either bit of ROMCP1 is set to '0', ROM code protect level 1 is turned on, so that the contents of the flash

memory are protected against readout and modification.

If either bit of ROMCP2 is set to '0', ROM code protect level 2 is turned on, enabling additional protection

against readout and modification (such as by a production LSI tester). If both level 1 and level 2 are

enabled, level 2 is selected by default.

If both of the two ROM code protect reset bits are set to “00,” ROM code protect is turned off, so that the

contents of the flash memory version can be read out or modified. Once ROM code protect is turned on,

the contents of the ROM code protect reset bits cannot be modified in parallel I/O mode. Use the serial I/

O or some other mode to rewrite the contents of the ROM code protect reset bits.

Figure 1.21.1. ROM code protect control address

Symbol

Address

When reset

ROMCP

0FFFFF16

FF16

ROM code protect level 2

set bit (Note 1, 2)

00: Protect enabled

01: Protect enabled

10: Protect enabled

11: Protect disabled

ROM code protect control address

Bit name

Function

Bit symbol

00: Protect removed

01: Protect set bit effective

10: Protect set bit effective

11: Protect set bit effective

00: Protect enabled

01: Protect enabled

10: Protect enabled

11: Protect disabled

ROM code protect reset

bit (Note 3)

ROM code protect level

1 set bit (Note 1)

ROMCP2

ROMCR

ROMCP1

b3 b2

b5 b4

b7 b6

Note 1: When ROM code protect is turned on, the on-chip flash memory is protected against

readout or modification in parallel input/output mode.

Note 2: When ROM code protect level 2 is turned on, ROM code readout by a shipment inspection

LSI tester, etc. also is inhibited. Customers desiring to use ROM code protect level 2 should

first contact their Renesas technical support representative.

Note 3: The ROM code protect reset bits can be used to turn off ROM code protect level 1 and

ROM code protect level 2. However, since these bits cannot be changed in parallel input/

output mode, they need to be rewritten in serial input/output or some other mode

Reserved bit

Always set this bit to 1.

M16C/26 датащи(PDF) 208 Page - Renesas Technology Corp

M16C/26 датащи(HTML) 208 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL